Datasheet

LTC3225/LTC3225-1
8
3225fb
APPLICATIONS INFORMATION
Programming Charge Current
The charge current is programmed with a single resistor
connecting the PROG pin to ground. The program resistor
and the input/output charge currents are calculated using
the following equations:
I
VIN
=
3600V
R
PROG
I
OUT
=
I
VIN
2
(with matched output capacitors)
An R
PROG
resistor value of 2k or less (i.e., short circuit)
causes the LTC3225/LTC3225-1 to enter overcurrent
shutdown mode. This mode prevents damage to the part
by shutting down the internal charge pump.
Power Effi ciency
The power effi ciency (η) of the LTC3225/LTC3225-1 is
similar to that of a linear regulator with an effective input
voltage of twice the actual input voltage. In an ideal regulat-
ing voltage doubler the power effi ciency is given by:
η
2xIDEAL
=
P
OUT
P
IN
=
V
OUT
•I
OUT
V
IN
•2I
OUT
=
V
OUT
2V
IN
At moderate to high output power the switching losses
and quiescent current of the LTC3225/LTC3225-1 are
negligible and the above expression is valid. For example,
with V
IN
= 3.6V, I
OUT
= 100mA and V
OUT
regulated to 5.3V,
the measured effi ciency is 71.2% which is in close agree-
ment with the theoretical 73.6% calculation.
Effective Open-Loop Output Resistance (R
OL
)
The effective open-loop output resistance (R
OL
) of a charge
pump is an important parameter that describes the strength
of the charge pump. The value of this parameter depends
on many factors including the oscillator frequency (f
OSC
),
value of the fl ying capacitor (C
FLY
), the non-overlap time,
the internal switch resistances (R
S
) and the ESR of the
external capacitors.
Charging Time Estimation
The estimated charging time with equal initial voltages
across the two supercapacitors is given by the equation:
t
CHRG
=
C
OUT
•V
COUT
–V
INI
(
)
I
OUT
where C
OUT
is the series output capacitance, V
COUT
is the
voltage threshold set by the V
SEL
pin, V
INI
is the initial
voltage at the C
OUT
pin and I
OUT
is the output charge
current given by:
I
OUT
=
1800V
R
PROG
When the charging process starts with unequal initial volt-
ages across the supercapacitors, only the capacitor with
the lower voltage level is charged; the other capacitor is
not charged until the voltages equalize. This extends the
charging time slightly. Under the worst-case condition,
whereby one capacitor is fully depleted while the other
remains fully charged due to signifi cant leakage current
mismatch, the charging time is about 1.5 times longer
than normal.
Thermal Management
For higher input voltages and maximum output current,
there can be substantial power dissipation in the LTC3225/
LTC3225-1. If the junction temperature increases above
approximately 150°C, the thermal shutdown circuitry auto-
matically deactivates the output. To reduce the maximum
junction temperature, a good thermal connection to the PC
board is recommended. Connecting the GND pin (Pin 8)
and the Exposed Pad (Pin 11) of the DFN package to a
ground plane under the device on two layers of the PC
board can reduce the thermal resistance of the package
and PC board considerably.