Datasheet
LTC3129-1
17
31291fa
For more information www.linear.com/LTC3129-1
operaTion
high resistance values that would not be practical due to the
effects of noise and board leakages that would cause V
OUT
regulation errors. The tap point on this divider is digitally
selected by using the VS1, VS2 and VS3 pins to program
one of eight fixed output voltages. The VS pins should be
grounded or connected to V
CC
to select the desired output
voltage, according to the following table. The VS1, VS2
and VS3 pins can also be driven by external logic signals
as long as the absolute maximum voltage ratings are not
exceeded. Note however that driving any of the voltage
select pins high to a voltage less than the V
CC
operating
voltage will result in increased quiescent current. Also
note that if the VS3 pin is driven above V
CC
, an external
1M resistor should be added in series. For other output
voltages, refer to the LTC3129 which has a feedback pin,
allowing any output voltage from 1.4V to 15.75V.
V
OUT
Program Settings for the LTC3129-1
VS3 PIN VS2 PIN VS1 PIN V
OUT
0 0 0 2.5V
0 0 V
CC
3.3V
0 V
CC
0 4.1V
0 V
CC
V
CC
5.0V
V
CC
0 0 6.9V
V
CC
0 V
CC
8.2V
V
CC
V
CC
0 12V
V
CC
V
CC
V
CC
15V
Note that in shutdown, or if V
CC
is below its UVLO thresh-
old, the internal voltage divider on V
OUT
is automatically
disconnected to eliminate any current draw on V
OUT
.
Thermal Considerations
The power switches of the LTC3129-1 are designed to op
-
erate continuously with currents up to the internal current
limit thresholds. However, when operating at high current
levels, there may be significant heat generated within the
IC. In addition, the V
CC
regulator can also generate wasted
heat when V
IN
is very high, adding to the total power
Figure 4. Typical 2-Layer PC Board Layout (MSE Package)
dissipation of the IC. As described elsewhere in this data
sheet, bootstrapping of the V
CC
for 5V output applications
can essentially eliminate the V
CC
power dissipation term
and significantly improve efficiency. As a result, careful
consideration must be given to the thermal environment
of the IC in order to provide a means to remove heat from
the IC and ensure that the
LTC3129-1 is
able to provide
its full rated output current. Specifically, the exposed die
attach pad of both the QFN and MSE packages must be
soldered to a copper layer on the PCB to maximize the
conduction of heat out of the IC package. This can be ac
-
complished by
utilizing multiple vias from the die attach
pad connection underneath the IC package to other PCB
layer(s) containing a large copper plane. A typical board
layout incorporating these concepts is shown in Figure 4.
If the IC die temperature exceeds approximately 180°C,
overtemperature shutdown will be invoked and all switching
will be inhibited. The part will remain disabled until the die
temperature cools by approximately 10°C. The soft-start
circuit is re-initialized in over temperature shutdown to
provide a smooth recovery when the IC die temperature
cools enough to resume operation.
GND V
IN
GND
31291 F04
V
OUT
C
OUT
C
IN
V
CC
C
BST1
C
BST2
L