Datasheet

LTC3114-1
15
Rev. C
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OPERATION
The SW1/SW2 forced low time on each switching cycle
briefly disconnects the inductor from V
OUT
and V
IN
result-
ing in slightly less output current in either buck or boost
mode for a given inductor current. In boost mode, the
output current is related to average inductor current and
duty cycle by
:
I
OUT(BOOST)
≈ I
L
• (1 – D)
where D is the converter duty cycle.
Since the output current in boost mode is reduced by the
duty cycle (D), the output current rating in buck mode is
always greater than in boost mode. Also, because boost
mode operation requires a higher inductor current for a
given output current compared to buck mode, the efficiency
in boost mode will be lower due to higher I
INDUCTOR
2
•
R
DS(ON)
losses in the power switches. This will further
reduce the output current capability in boost mode. In
either operating mode, however, the inductor peak-to-peak
ripple current does not play a major role in determining the
output current capability, unlike peak current mode control.
With peak current mode control, the maximum output
current capability is reduced by the magnitude of inductor
ripple current because the peak inductor current level is the
control variable, but the average inductor current is what
determines the output current. The LTC3114 -1 measures
and controls average inductor current, and therefore, the
inductor ripple current magnitude has little effect on the
maximum current capability in contrast to an equivalent
peak current mode converter. Under most conditions in
buck mode, the LTC3114 -1 is capable of providing 1A to
the load. Under certain conditions, more output current is
possible, refer to the Typical Performance Characteristics
section for more details. In boost mode, as described
previously, the output current capability is related to the
boost ratio or duty cycle (D). For a 3.6V V
IN
to 5V output
application, the LTC3114-1 can provide up to 500mA to
the load. Refer to the Typical Performance Characteristics
section for more detail on output current capability.
At VC levels below 135mV, the LTC3114-1 will not com
-
mand any current because the internal current sense signal
has a built-in
135mV offset. Therefore, the active range of
VC is between approximately 135mV (zero current) and
1V (full current). In some applications, an external circuit
may be used to control the VC voltage level. Any such
circuit needs to have the capability to sink or source the
approximate 12µA provided by the internal error amplifier
and to pull below 135mV to disable the current command,
if necessary.
OVERLOAD CURRENT LIMIT AND ZERO CURRENT
COMPARATOR
The internal current sense waveform is also used by the
peak overload current (I
PEAK
) and zero current (I
ZERO
)
comparators. The I
PEAK
current comparator monitors I
S-
ENSE
and halts converter operation if the inductor current
level exceeds its maximum internal threshold, which is
approximately 50% above the normal maximum current
level commanded by the current control loop. An induc
-
tor current level of this magnitude will only occur during
a fault, such as an output short cir
cuit or a fast V
IN
(line)
transient. If the I
PEAK
comparator is engaged, the PWM is
halted for the remainder of the switching cycle with SW1
and SW2 held low. If V
OUT
is less than approximately 1.8V
when the peak limit occurs, then a soft-start cycle is initi-
ated. In the event that the current overload is the result
of an output short-cir
cuit condition, the LTC3114-1 will
remain in a low frequency restart mode, keeping the on-chip
power dissipation to very low levels. If the short circuit is
removed, the LTC3114-1 will restart in the normal fashion.
The LTC3114-1 exhibits discontinuous inductor current
operation at light output loads by virtue of the I
ZERO
comparator circuit under most operating conditions. This
improves efficiency at light output loads if PWM mode
operation compared to continuous conduction mode. If
the internal current sense waveform transitions below the
internally set zero current threshold, the LTC3114-1 will
disconnect the inductor from V
OUT
, by shutting off switch
D, to prevent discharge of the output capacitor. The I
ZERO
circuitry is reset by the oscillator clock at the end of the
switching cycle. The I
ZERO
comparator threshold is set
slightly above zero current to compensate for comparator
propagation delay. In some cases, the inductor current
may reverse slightly if there is a very high voltage output
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