Datasheet
LTC3109
10
3109fb
For more information www.linear.com/LTC3109
V
OUT
storage capacitor is still charging. In the event of a
step load on the LDO output, current can come from the
main V
OUT
reservoir capacitor. The LDO requires a 2.2µF
ceramic capacitor for stability. Larger capacitor values
can be used without limitation, but will increase the time
it takes for all the outputs to charge up. The LDO output
is current limited to 5mA minimum.
V
OUT
The main output voltage on V
OUT
is charged from the VAUX
supply, and is user-programmed to one of four regulated
voltages using the voltage select pins VS1 and VS2, ac
-
cording to Table 2. Although the logic-threshold voltage
for VS1 and VS2 is 0.85V typical, it is recommended that
they be tied to ground or VAUX.
Table 2
VS2 VS1 V
OUT
GND GND 2.35V
GND VAUX 3.3V
VAUX GND 4.1V
VAUX VAUX 5V
When the output voltage drops slightly below the regulated
value, the charging current will be enabled as long as VAUX
is greater than 2.5V. Once V
OUT
has reached the proper
value, the charging current is turned off. The resulting
ripple on V
OUT
is typically less than 20mV peak to peak
.
The internal programmable resistor divider, controlled by
VS1 and VS2, sets V
OUT
, eliminating the need for very
high value external resistors that are susceptible to noise
pickup and board leakages.
In a typical application, a reservoir capacitor (typically a
few hundred microfarads) is connected to V
OUT
. As soon
as VAUX exceeds 2.5V, the V
OUT
capacitor will begin to
charge up to its regulated voltage. The current available
to charge the capacitor will depend on the input voltage
and transformer turns ratio, but is limited to about 15mA
typical. Note that for very low input voltages, this current
may be in the range of 1µA to 1000µA.
PGOOD
A power good comparator monitors the V
OUT
voltage.
The PGOOD pin is an open-drain output with a weak pull-
up (1MΩ) to the LDO voltage. Once V
OUT
has charged
to within 7.5% of its programmed voltage, the PGOOD
output will go high. If V
OUT
drops more than 9% from its
programmed voltage, PGOOD will go low. The PGOOD
output is designed to drive a microprocessor or other
chip I/O and is not intended to drive a higher current load
such as an LED. The PGOOD pin can also be pulled low in
a wire-OR configuration with other circuitry.
V
OUT2
V
OUT2
is an output that can be turned on and off by the
host using the V
OUT2_EN
pin. When enabled, V
OUT2
is con-
nected to V
OUT
through a 1Ω P-channel MOSFET switch.
This output, controlled by a host processor, can be used
to power external circuits such as sensors and amplifiers,
that don’t have a low power “sleep” or shutdown capabil
-
ity. V
OUT2
can be used to power these circuits only when
they are needed.
Minimizing the amount of decoupling capacitance on
V
OUT2
enables it to be switched on and off faster, allow-
ing shorter pulse times and therefore smaller duty cycles
in applications such as a wireless sensor/transmitter. A
small V
OUT2
capacitor will also minimize the energy that
will be wasted in charging the capacitor every time V
OUT2
is enabled.
V
OUT2
has a current limiting circuit that limits the peak
current to 0.3A typical.
The V
OUT2
enable input has a typical threshold of 1V
with 100mV of hysteresis, making it logic compatible. If
V
OUT2_EN
(which has an internal 5M pull-down resistor)
is low, V
OUT2
will be off. Driving V
OUT2_EN
high will turn
on the V
OUT2
output.
Note that while V
OUT2_EN
is high, the current limiting cir-
cuitry for V
OUT2
draws an extra 8µA of quiescent current
from V
OUT
. This added current draw has a negligible effect
operaTion
(Refer to the Block Diagram)