Datasheet

LTC3103
8
3103f
BLOCK DIAGRAM
–
+
–
+
+
–
+
UVLO
I
PEAK
I
PEAK(REF)
TOP_ON
BOT_ON
V
REF_GOOD
SHUTDOWN
CONTROL
LOGIC
ANTICROSS
CONDUCT
BURST ENABLE
TSD
V
REF
UVLO
V
CC
OSC
I
BIAS
BOOSTV
CC
V
CC
PRE-REG
+
0.8V
RUN
R6
R5
0.6V 0.8V
–
+
SD LOGIC
7
BST
V
IN
C
BST
V
OUT
L1
V
CC
6
MODE
THERMAL
SHUTDOWN
PWM
COMP
SLEEP
COMP
SLEEP
REF
GND
0.6V – 10%
PWM
–
+
I
PEAK
COMP
–
+
–
+
I
ZERO
COMP
SLOPE COMP
0.6V
SSg
m
C3
10
NC
9
4
3
1
SW
2
FB
R2
R1
3103 BD
8
PGOOD
5
C2
C1