Datasheet

LTC3103
14
3103f
tied to the RUN pin as shown in Figure 2 to meet specific
V
IN
voltage requirements. If used, note that the external
divider current is not included in the LTC3103 quiescent
current specification.
The rising UVLO threshold can be calculated using the
following equation:
V
UVLO
= 0.8V • 1+
R4
R3






APPLICATIONS INFORMATION
Internal V
CC
Regulator
The LTC3103 uses an internal NMOS source follower
regulator off of V
IN
to generate a low voltage internal rail,
V
CC
. The regulator is designed to deliver current only to
the internal drivers and other internal control circuits and
not to an external load. The V
CC
pin should be bypassed
with a 1µF or larger ceramic capacitor.
Boost Capacitor Selection
The LTC3103 uses a bootstrapped supply to power the
buck switch gate drivers. When the synchronous rectifier
turns on, an internal PMOS switch turns on synchronously
to charge the boost capacitor, C
BST
, to the voltage on V
CC
.
For most applications a 0.022µF will suffice. The capaci-
tor should be placed as close to their respective pins as
possible.
Figure 3. PCB Layout Recommendations
10
9
6
7
8
4
5
3
2
1
MODE
NC
FB
RUN
V
CC
V
IN
SW
BST
GND
PGOOD
KELVIN TO V
OUT
3103 F03
UNINTERRUPTED GROUND PLANE
SHOULD EXIST UNDER ALL COMPONENTS
SHOWN AND UNDER THE TRACES
CONNECTING THOSE COMPONENTS
V
OUT
VIA GROUND PLANE
V
IN
RUN
LTC3103
GND
V
IN
R3
R4
3103 F02
Figure 2. Setting the Undervoltage Lockout Threshold