Datasheet

LTC3103
10
3103f
OPERATION
Power Good Status Output
The PGOOD pin is an open-drain output which indicates
the output voltage status of the step-down converter. If the
output voltage falls 10% below the regulation voltage, the
PGOOD open-drain output will pull low. A built-in deglitch-
ing delay prevents false trips due to voltage transients on
load steps. The output voltage must rise 2% above the
falling threshold before the pull-down will turn off. The
PGOOD output will also pull low during overtemperature
shutdown and undervoltage lockout to indicate these fault
conditions. The PGOOD output is valid 1ms after the buck
converter is enabled. When the converter is disabled the
open-drain device is forced on into a low impedance state.
The PGOOD pull-up voltage must be below the 6V absolute
maximum voltage rating of the pin.
Current Limit
The peak inductor current limit comparator shuts off the
buck switch once the internal limit threshold is reached.
Peak switch current is no less than 400mA.
Slope Compensation
Current mode control requires the use of slope com-
pensation to prevent sub-harmonic oscillations in the
inductor current waveform at high duty cycle operation. In
some current mode ICs, current limiting is performed by
clamping the error amplifier voltage to a fixed maximum
which leads to a reduced output current capability at low
step-down ratios. Slope compensation is accomplished
on the LTC3103 internally through the addition of a com-
pensating ramp to the current sense signal. The current
limiting function is completed prior to the addition of the
compensation ramp and therefore achieves a peak inductor
current limit that is independent of duty cycle.
Short-Circuit Protection
When the output is shorted to ground, the error amplifier
will saturate high and the high side switch will turn on at
the start of each cycle and remain on until the current limit
trips. During this minimum on-time, the inductor current
will increase rapidly and will decrease very slowly during
the remainder of the period due to the very small reverse
voltage produced by a hard output short. To eliminate the
possibility of inductor current runaway in this situation, the
switching frequency is reduced to approximately 300kHz
when the voltage on FB falls below 0.3V.
BST Pin Function
The input switch driver operates from the voltage gener-
ated on the BST pin. An external capacitor between the SW
and BST pins and an internal synchronous PMOS boost
switch are used to generate a voltage that is higher than
the input voltage. When the synchronous rectifier is on
(SW is low) the internal boost switch connects one side
of the capacitor to V
CC
replenishing its charge. When the
synchronous rectifier is turned off the input switch is turned
on forcing SW high and the BST pin is at a potential equal
to V
CC
+ SW relative to ground.
A comparator ensures there is sufficient voltage across
the boost capacitor to guarantee start-up after long sleep
periods or if starting up into a pre-biased output.
Undervoltage Lockout
The LTC3103 has an internal UVLO which disables the
converter if the supply voltage decreases below 2.1V
(typical), the converter will be disabled. The soft-start for
the converter will be reset during undervoltage lockout to
provide a smooth restart once the input voltage increases
above the undervoltage lockout threshold. The RUN pin
can alternatively be configured as a precise undervoltage
lockout (UVLO) on the V
IN
supply with a resistive divider
connected to the RUN pin.