Datasheet

LTC3101
23
3101fb
APPLICATIONS INFORMATION
Table 3. Buck Minimum Recommended Output Capacitance
OUTPUT VOLTAGE
MINIMUM RECOMMENDED
OUTPUT CAPACITANCE
0.6V 22F
0.8V 22F
1.2V 10F
1.8V 10F
2.7V 4.7F
3.3V 4.7F
Buck Input Capacitor Selection
The BAT1 and USB1 pins provides current to the power
stages of both buck converters. It is recommended that a
low ESR ceramic capacitor with a value of at least 4.7µF
be used to bypass each of these pins. These capacitors
should be placed as close to the respective pin as pos-
sible and should have a short return path to the backpad
of the IC.
Buck Output Voltage Programming
The buck output voltages are programmed via external
resistor dividers connected to the respective feedback pin
(FB1 or FB2) as shown in Figure 4.
The resistor divider resistors control the output voltage
according to the following formula:
V
OUT1,2
= 0.596 1+
R2
R
1






V
()
(1)
If the impedance of the resistor divider is too high it will
increase noise sensitivity due to coupling of stray noise
to the feedback pin. In addition, the parallel resistance
of the resistor divider resistors in series with the input
capacitance of the feedback pin produce a parasitic pole
that can reduce the loop phase margin if it becomes too
low in frequency. For these reasons, it is recommended
that the resistance of R1 in parallel with R2 be kept under
300k. A reasonable compromise between noise immu-
nity and quiescent current is provided by choosing R2 =
221k. The required value for R1 can then be calculated
via Equation 1.
To further increase the noise immunity of the feedback pin
and improve the transient response of the buck converter,
a small value feedforward capacitor, C
FF
, can be added in
parallel with the upper feedback divider resistor, R2. This
reduces the impedance of the feedback pin at high frequen-
cies thereby increasing its immunity from picking up stray
noise. In addition, this adds a pole-zero pair to the loop
dynamics which generates a phase boost that can improve
the phase margin and increase the speed of the transient
response, resulting in smaller voltage deviation on load
transients. The zero frequency depends not only on the
value of the feedforward capacitor, but also on the upper
resistor divider resistor. Specifi cally, the zero frequency,
f
ZERO
, is given by the following equation:
f
RC
ZERO
FF
=
1
22•• •π
Ideally, the phase boost generated by the pole-zero pair
should be centered at the loop crossover frequency. Table 4
provides the recommended feedback divider resistor values
and corresponding feedforward capacitors for several
commonly utilized output voltages.
Table 4. Buck Resistor Divider and Feedforward Capacitor
Values
V
OUT
R1 R2 C
FF
C
OUT
0.6V – 0 – 22µF
0.8V 649k 221k 18pF 22µF
1.0V 324k 221k 18pF 22µF
1.2V 221k 221k 18pF 10µF
1.5V 147k 221k 18pF 10µF
1.8V 110k 221k 18pF 10µF
2.0V 86.6k 205k 18pF 10µF
2.7V 56.2k 200k 18pF 4.7µF
3.3V 48.7k 221k 18pF 4.7µF
FB1,2
R2
R1
3101 F04
C
FF
LTC3101
GND
V
OUT1,2
≥ 0.600V
Figure 4. Setting the Buck Output Voltages