Datasheet

LTC2974

2974fc

For more information www.linear.com/LTC2974

WRITE_PROTECT Data Contents

BIT(S) SYMBOL OPERATION

b[7:0] Write_protect[7:0] 1000_0000b: Level 1 Protection - Disable all writes except to the WRITE_PROTECT, PAGE, MFR_EE_UNLOCK, and STORE_

USER_ALL commands.

0100_0000b: Level 2 Protection – Disable all writes except to the WRITE_PROTECT, PAGE, MFR_EE_UNLOCK, STORE_

USER_ALL, OPERATION, MFR_PAGE_FF_MASK and CLEAR_FAULTS commands.

0000_0000b: Enable writes to all commands.

xxxx_xxxxb: All other values reserved.

WRITE-PROTECT Pin

The WP pin allows the user to write-protect the LTC2974’s configuration registers. The WP pin is active high, and when

asserted it provides Level 2 protection: all writes are disabled except to the WRITE_PROTECT, PAGE, MFR_EE_UNLOCK,

STORE_USER_ALL, OPERATION, MFR_PAGE_FF_MASK and CLEAR_FAULTS commands. The most restrictive setting

between the WP pin and WRITE_PROTECT command will override. For example if WP = 1 and WRITE_PROTECT =

0x80, then the WRITE_PROTECT command overrides, since it is the most restrictive.

MFR_PAGE_FF_MASK

The MFR_PAGE_FF_MASK command is used to select which channels respond when the global page command

(PAGE=0xFF) is in use.

MFR_PAGE_FF_MASK Data Contents

BIT(S) SYMBOL OPERATION

b[7:4] Reserved Always returns 0000b

b[3] Mfr_page_ff_mask_chan3 Channel 3 masking of global page command (PAGE=0xFF) accesses

0 = ignore global page command accesses

1 = fully respond to global page command accesses

b[2] Mfr_page_ff_mask_chan2 Channel 2 masking of global page command (PAGE=0xFF) accesses

0 = ignore global page command accesses

1 = fully respond to global page command accesses

b[1] Mfr_page_ff_mask_chan1 Channel 1 masking of global page command (PAGE=0xFF) accesses

0 = ignore global page command accesses

1 = fully respond to global page command accesses

b[0] Mfr_page_ff_mask_chan0 Channel 0 masking of global page command (PAGE=0xFF) accesses

0 = ignore global page command accesses

1 = fully respond to global page command accesses

MFR_I2C_BASE_ADDRESS

The MFR_I2C_BASE_ADDRESS command determines the base value for the I

C/SMBus address byte. Offsets of 0 to

9 are added to this base address to generate the device I

C/SMBus address. The part responds to the device address.

MFR_I2C_BASE_ADDRESS Data Contents

BIT(S) SYMBOL OPERATION

b[7] Reserved Read only, always returns 0.

b[6:0] i2c_base_address This 7-bit value determines the base value of the 7-bit I

C/SMBus address. See Operation Section: Device Address.

pMbus coMManD DescripTion