Datasheet

LTC2970/LTC2970-1
19
29701fc
OPERATIO
U
CH0_A_SERVO, CH1_A_SERVO: Voltage Servo Control
Registers – Read/Write
BIT(s) SYMBOL OPERATION
b[14:0] Ch0_a_servo[14:0]
Ch1_a_servo[14:0]
During servo operation
Chn_a_idac[7:0] output current is
stepped to force Chn_a_adc[14:0]
code to equal target code stored in
Chn_a_servo[14:0].
2’s complement format, b[14] = sign
Default value is undefi ned.
b[15] Ch0_a_servo_en
Ch1_a_servo_en
0 = Chn_a servo disabled (default).
1 = Chn_a servo enabled.
CH0_A_IDAC, CH1_A_IDAC: IDAC Control/Data Registers –
Read/Write
BIT(s) SYMBOL OPERATION
b[7:0] Ch0_a_idac[7:0]
Ch1_a_idac[7:0]
Chn_a IDAC data value.
b[8] Ch0_a_idac_en
Ch1_a_idac_en
0 = V
OUTn
output tri-stated.
1 = V
OUTn
output enabled.
There are two ways to enable
V
OUTn
.
1) When Chn_a_idac_en is set
high with Chn_a_idac_con low,
the LTC2970 will perform a soft
connect. During a soft connect,
the V
OUTn
voltage buffer output
will not be connected to the V
OUTn
pin until the internal algorithm
has servo’d the voltage at the
IDACn pin to match the V
OUTn
pin voltage. Resolution is one
Chn_a_idac LSB.
2) When Chn_a_idac_en is
enabled with Chn_a_idac_con
high, the LTC2970 will perform
a hard connect. The V
OUTn
voltage buffer will be immediately
connected to the V
OUTn
pin.
b[9] Ch0_a_idac_con
Ch1_a_idac_con
0 = V
OUTn
is not enabled or
has been enabled but is not yet
connected to the output of the
CHn voltage buffer. (Default)
1 = V
OUTn
is enabled and has been
connected to the output of the
CHn voltage buffer.
See Chn_a_idac_en for additional
information.
b[10] Ch0_a_idac_pol
Ch1_a_idac_pol
0 = Use this setting when
increasing V
OUTn
causes
(VINn_AP-VINn_AM) to decrease.
Inverting confi guration common
to DC/DC converters with external
feedback networks.
1 = Use this setting when
increasing V
OUTn
causes
(VINn_AP-VINn_AM) to increase.
Non-inverting confi guration
common to DC/DC converters
with trim pins.
b[11] Ch0_a_idac_servo_repeat
Ch1_a_idac_servo_repeat
0 = During servo operation, servo
Chn_a until the measured result
is stable and matches the target
code.
1 = During servo operation,
continuously servo Chn_a to the
target code.
b[15:12] Reserved Always Returns 0
CH0_A_IDAC_TRACK and CH1_A_IDAC_TRACK: IDAC Tracking
data and control registers – Read/Write
LTC2970-1 Only
BIT(s) SYMBOL OPERATION
b[7:0] Ch0_a_idac_
track[7:0]
Ch1_a_idac_
track[7:0]
Final target value for of Chn_a_
idac[7:0]. During tracking, Chn_a_
idac[7:0] is incremented/decremented
by 1 until it is equal to this value.
b[8] Ch0_a_idac_track_en
Ch1_a_idac_track_en
0 = inhibit tracking of Chn_a_idac[7:0].
1 = enable tracking of Chn_a_idac[7:0]
b[15:9] Reserved Always Returns 0
CH0_A_DELAY_TRACK and CH1_A_DELAY_TRACK: IDAC
Tracking delay register – Read/Write
LTC2970-1 Only
BIT(s) SYMBOL OPERATION
b[9:0] Ch0_a_delay_track[9:0]
Ch1_a_delay_track[9:0]
Delay used to synchronize or offset
tracking events.
b[1510] Reserved Always Returns 0
4. Detailed I
2
C Command Register Descriptions
(Cont.)