Datasheet

LTC2970/LTC2970-1
15
29701fc
OPERATIO
U
Table 2. LTC2970 Address Table
ADDRESS[7:0]
(R/W = 0)
ADDRESS[7:1] ASEL1 ASEL0
8’hB8 7’h5C L L
8’hBA 7’h5D L F
8’hBC 7’h5E L H
8’hBE 7’h5F F L
8’hD6 7’h6B F F
8’hD8 7’h6C F H
8’hDA 7’h6D H L
8’hDC 7’h6E H F
8’hDE 7’h6F H H
Table 3. Special LTC2970 Addresses
ADDRESS[7:0]
(R/W = 0)
ADDRESS[7:1] FUNCTION
ARA 8’h18 7’h0C This is the standard Alert
Response Address for all
SMBus devices. This address is
independent of the value of the
ASEL1 and ASEL0 pins.
Global 8’hB6 7’h5B This a global address to which
all LTC2970s will respond. This
address is independent of the
value of the ASEL1 and ASEL0
pins.
3. Register Command Set
COMMAND FUNCTION DESCRIPTION R/W DATA
LENGTH
COMMAND
BYTE VALUE
FAULT() Instantaneous Fault Status For All Channels Read Only 16 Bits ‘h00
FAULT_EN() Enable For All Latched Faults and Servo On Fault Read/Write 16 Bits ‘h08
FAULT_LA_INDEX() Index to All Latched Faults Read Only 16 Bits ‘h10
FAULT_LA() Latched Fault Status For All Channels Read Only 16 Bits ‘h11
IO() IO Control and Status Register Read/Write 16 Bits ‘h17
ADC_MON() Control Register For Selecting ADC Channels to Monitor Read/Write 16 Bits ‘h18
*SYNC() Control Register For Synchronizing Tracking Across Multiple Devices Read/Write 16 Bits ‘h1F
VDD_ADC() V
DDIN
ADC Conversion Result Register Read Only 16 Bits ‘h28
VDD_OV() V
DDIN
Over-Voltage Monitor Control Register Read/Write 16 Bits ‘h29
VDD_UV() V
DDIN
Under-Voltage Monitor Control Register Read/Write 16 Bits ‘h2A
V12_ADC() 12V
IN
ADC Conversion Result Register Read Only 16 Bits ‘h38
V12_OV() 12V
IN
Over-Voltage Monitor Control Register Read/Write 16 Bits ‘h39
V12_UV() 12V
IN
Under-Voltage Monitor Control Register Read/Write 16 Bits ‘h3A
CH0_A_ADC() CH0_A ADC Conversion Result Register Read Only 16 Bits ‘h40
CH0_A_OV() CH0_A Over-Voltage Monitor Control Register Read/Write 16 Bits ‘h41
CH0_A_UV() CH0_A Under-Voltage Monitor Control Register Read/Write 16 Bits ‘h42
CH0_A_SERVO() CH0_A Voltage Servo Control Register Read/Write 16 Bits ‘h43
CH0_A_IDAC() CH0_A IDAC Control Register Read/Write 16 Bits ‘h44
*CH0_A_IDAC_TRACK() CH0_A IDAC Track Final Value Register Read/Write 16 Bits ‘h45
*CH0_A_DELAY_TRACK() CH0_A IDAC Track Delay Register Read/Write 16 Bits ‘h46
CH0_B_ADC() CH0_B ADC Conversion Result Register Read Only 16 Bits ‘h48
CH0_B_OV() CH0_B Over-Voltage Monitor Control Register Read/Write 16 Bits ‘h49
CH0_B_UV() CH0_B Under-Voltage Monitor Control Register Read/Write 16 Bits ‘h4A
CH1_A_ADC() CH1_A ADC Conversion Result Register Read Only 16 Bits ‘h50
CH1_A_OV() CH1_A Over-Voltage Monitor Control Register Read/Write 16 Bits ‘h51
CH1_A_UV() CH1_A Under-Voltage Monitor Control Register Read/Write 16 Bits ‘h52
L: V
ASELn
< V
IL_ASEL
F: ASELn Floating H: V
ASELn
> V
IH_ASEL