Datasheet

LTC2952
12
2952fb
BLOCK DIAGRAM
CP4
0.5V
–
+
V2 VS
V2
G1G2
GATE
STAT
ON/OFF
V1
2952 BD
IDEAL DIODE DRIVER 1
GATE
IDEAL DIODE DRIVER 2
LINEAR GATE
DRIVER AND
VOLTAGE CLAMP
ANALOG
CONTROLLER
INTERNAL
ENABLE
INTERNAL
ENABLE
G1STAT
EN
INT
SECONDARY SUPPLY TO LOAD PRIMARY SUPPLY
A1
V
CC
V
CC
VSV
IN
V
IN
VS
VS V1
A2
ANALOG
CONTROLLER
LINEAR GATE
DRIVER AND
VOLTAGE CLAMP
OFFT
ONT
PUSHBUTTON
DETECT
LOGIC
LDO/BAND GAP
REF
0.5V 0.775V
M2
CP5
0.5V
3μA
10μA
–
+
M1
GND
CP3
CP6
0.5V
0.775V
–
+
KILL
PB
+
–
+
–
V
CC
–
+
PUSH-BUTTON
OSCILLATOR
200ms RST DELAY/
1.6s WATCHDOG TIMER
PFI
PFO
MONITORS
CP2
0.5V
WDE
THREE-STATE/
EDGE DETECTOR
+
–
VM
CP1
0.5V
+
–
RST
200μS
FILTER