Datasheet

LTC2942-1
11
29421f
applicaTions inFormaTion
Example: a register value of I[7:0] = B0
h
and J[7:0] = 1C
h
corresponds to a voltage on SENSE
–
of:
V V
B C
FFFF
V V
SENSE
h
h
DEC
–
• • .= = ≈6
01
6
45084
65535
4 1276
Voltage is measured at the internal bond pads connected to
SENSE
–
, hence, the current flowing through the combined
pin and bond wire resistance causes the measured voltage
to deviate slightly from the actual battery voltage at the
SENSE
–
package pin. For the full-scale current of ±1A at
room temperature, this error is typically ±9mV, which is
negligible in most applications. To increase the precision
of the voltage measurement, the error can be reduced by
differentiating the coulomb counter data, multiplying the
resultant current value by 9 mΩ, and adding or subtract-
ing the result from the voltage measurement. Note that
the sign of the error changes depending on the direction
of the current flow.
The actual temperature can be obtained from the two byte
register C[7:0]D[7:0] by:
T K
RESULT
FFFF
K
RESULT
h
h
DEC
= =600 600
65535
• •
Example: a register value of C[7:0] = 80
h
D[7:0] = 00
h
corresponds to 300K or 27°C.
Temperature is measured on the surface of the chip (T
DIE
),
which may be different from ambient temperature T
AMB
,
especially with high sense resistor currents. To minimize
errors in the temperature measurement, the DFN package’s
exposed pad may be thermally coupled to the body whose
temperature is to be measured. With the recommended PCB
layout (Figure 11), T
DIE
typically increases over T
AMB
by
1K for 0.25A, 3K for 0.5A and 12K for 1A. Different results
may be obtained depending on layout, mounting details,
and air flow. Software in the host system can reduce this
error if the rise over T
AMB
is known by differentiating the
coulomb counter data to obtain current and using this
value to correct the temperature reading.
Threshold Registers (E, F, G, H, K, L, O, P)
For each of the measured quantities (battery charge, volt-
age and temperature) the LTC2942-1 features a high and a
low threshold registers. At power-up, the high thresholds
are set to FFFFh while the low thresholds are set to 0000h.
All thresholds can be programmed to a desired value via
I
2
C. As soon as a measured quantity exceeds the high
threshold or falls below the low threshold, the LTC2942-1
sets the corresponding flag in the status register and
pulls the AL/CC pin low if alert mode is enabled via bits
B[2:1]. Note that the voltage and temperature threshold
registers are single byte registers and only the 8 MSBs of
the corresponding quantity are checked. To set a low level
threshold for the battery voltage of 3V, register L should
be programmed to 80h; a high temperature limit of 60°C
is programmed by setting register O to 8Eh.
I
2
C Protocol
The LTC2942-1 uses an I
2
C/SMBus compatible 2-wire
open-drain interface supporting multiple devices and
masters on a single bus. The connected devices can only
pull the bus wires low and they never drive the bus high.
The bus wires must be externally connected to a positive
supply voltage via a current source or pull-up resistor.
When the bus is idle, both SDA and SCL are high. Data on
the I
2
C bus can be transferred at rates of up to 100kbit/s
in standard mode and up to 400kbit/s in fast mode.
Each device on the I
2
C/SMbus is recognized by a unique
address stored in that device and can operate as either a
transmitter or receiver, depending on the function of the
device. In addition to transmitters and receivers, devices
can also be classified as masters or slaves when perform-
ing data transfers. A master is the device which initiates a
data transfer on the bus and generates the clock signals
to permit that transfer. At the same time any device ad-
dressed is considered a slave. The LTC2942-1 always
acts as a slave.
Figure 3 shows an overview of the data transmission for
fast and standard mode on the I
2
C bus.
Start and Stop Conditions
When the bus is idle, both SCL and SDA must be high. A
bus master signals the beginning of a transmission with
a START condition by transitioning SDA from high to low
while
SCL
is high. When the master has finished com-
municating with the slave, it issues a STOP condition by