Datasheet
LTC2912
11
2912fb
For more information www.linear.com/LTC2912
TYPICAL APPLICATIONS
APPLICATIONS INFORMATION
The rise time on the UV, OV and 0V pins is limited by a 400k
pull‑up resistance to V
CC
. A similar formula estimates the
output rise time (10% to 90%) at the UV, OV and OV pins:
t
RISE
≈ 2.2 • R
PU
• C
LOAD
where R
PU
is the pull‑up resistance.
OV/OV Latch (LTC2912-1, LTC2912-3)
With the LATCH pin held low, the OV pin latches low
(LTC2912‑1) and the OV pin latches high (LTC2912‑3)
when an OV condition is detected. The latch is cleared
by raising the LATCH pin high. If an OV condition clears
while LATCH is held high, the latch is bypassed and the
OV and OV pins behave the same as the UV pin with a
similar timeout period at the output. If LATCH is pulled
low while the timeout period is active, the OV and OV pins
latch as before.
Disable (LTC2912-2)
The LTC2912‑2 allows disabling the UV and OV outputs via
the DIS pin. Pulling DIS high forces both outputs to remain
weakly pulled high, regardless of any faults that occur on
the inputs. However, if a UVLO condition occurs, UV as
‑
serts and
pulls low, but the timeout function is bypassed.
UV
pulls high as soon as the UVLO condition is cleared.
DIS has a weak 2µA (typical) internal pull‑down current
guaranteeing normal operation with the pin left open.
Dual UV/OV Supply Monitor, 3.3V ±10% Tolerance
48V Supply Monitor (<±10% = Powergood)
Dual UV Supply Monitor, 3.3V, 2.5V, 10% Tolerance
R
B
1k
R
C
27.4k
VH
1
6
7
2
3
8
45
VL
GND TMR
SYSTEM
POWER
SUPPLY
OV
UV
2912 TA02
LATCH
C
TMR
22nF
TIMEOUT = 200ms
R
A
4.53k
V
CC
LTC2912-1
C
BYP
0.1µF
3.3V
R
B
80.6k
R
C
37.4M
R
Z
200k
R
PG
30k
POWERGOOD
LED
VH
1
6
7
2
3
8
45
VL
GND TMR
POWER
SUPPLY
OV
UV
2912 TA03
DIS
R
A
357k
C
TMR
10nF
TIMEOUT = 85ms
V
CC
LTC2912-2
C
BYP
0.1µF
48V
R
A1
11k
R
B1
54.9k
R
B2
39.2k
R
OV
10k
V
H
1
6
7
2
3
8
4
5
V
L
GND
TMR
SYSTEM
POWER
SUPPLIES
OV
UV
2912 TA04
DIS
R
A2
11k
V
CC
LTC2912-2
C
BYP
0.1µF
2.5V
3.3V
R
UV
10k