Datasheet

LTC2875
15
Rev A
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APPLICATIONS INFORMATION
the voltage on RS increases the slew control current I
SC
being drawn from the slew control circuit until the voltage
reaches ~ 0.9V, where the current drawn from the circuit
is ~ –100µA. Below an applied voltage of ~ 0.9V, the slew
control circuit sources no additional current, and the cur
-
rent drawn from it remains at ~ –100µA down to 0V.
The total current I
RS
drawn from the RS pin for input volt-
age 0.9V ≤ V
RS
≤ 1.1V is the sum of the internal pull-up
resistor current I
RS
and the slew control current I
SC
.
I
RS
(
0.9V ≤ V
RS
≤ 1.1V
)
= I
PU
+ I
SC
=
V
CC
– V
RS
250k
+
1.1V – V
RS
2k
The transmitter slew rate is controlled by the slew con-
trol current I
SC
with increasing current magnitude corre-
sponding to higher slew rates. The slew rate can be con-
trolled using a single slew control resistor RSL in series
with the RS pin. When the RS pin is pulled low towards
ground by an external driver, RSL limits the amount of
current drawn from the RS pin and sets the transmitter
slew rate. Alternatively, the slew rate may be controlled
by an external voltage or current source.
High Symmetry Driver with Variable Slew Rate
The electromagnetic emissions spectrum of a differential
line transmitter is largely determined by the variation in
the common mode voltage during switching, as the dif
-
ferential component of the emissions from the two lines
cancel, while the common mode emissions of the two
lines add. The LTC2875 transmitter has been designed
to maintain highly symmetric transitions on the CANH
and CANL lines to minimize the perturbation of the com-
mon mode voltage during switching (Figure12), resulting
in low EME. The common mode switching symmetry is
guaranteed by the V
SYM
specification.
In addition to full compliance with the ISO 11898-2 stan-
dard, LTC2875 meets the more stringent requirements
of ISO 11898-5 for bus driver symmetry. This requires
that the common mode voltage stay within the limits not
only during the static dominant and recessive states, but
during the bit transition states as well. Ultra-high speed
peak detect circuits are used during manufacturing test
to ensure that V
SYM
limits are not exceeded at any point
during the switching cycle.
The high frequency content may be reduced by choosing
a lower data rate and a slower slew rate for the signal
transitions. The LTC2875 provides an approximate 20 to 1
reduction in slew rate, with a corresponding decrease in
the high frequency content. The lowest slew rate is suit-
able for data communication at 200kbps or below, while
the highest slew rate supports
4Mbps. The slew rate limit
circuit maintains consistent control of transmitter slew
rates across voltage and temperature to ensure predict-
able performance under all operating conditions. Figure13
demonstrates the reduction in high frequency content of
the common mode voltage achieved by the lowest slew
rate compared to the highest slew rate at 200kbps.
Figure12. Low Perturbation of Common Mode Voltage
During Switching
200ns/DIV
CANL
500mV/DIV
COMMON MODE
500mV/DIV
CANH
500mV/DIV
2875 F12
1Mbps
V
CC
= 3.3V
500kHz/DIV
0dB
0dB
20dB/DIV
20dB/DIV
2875 F13
RSL = 0
RSL = 200k
Figure13. Power Spectrum of Common Mode Voltage
Showing High Frequency Reduction of Lowest Slew
Rate (RSL=200k) Compared to Highest Slew Rate (RSL=0)
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