Datasheet

LTC2756
9
2756f
pin FuncTions
S0 (Pin 20): Span Bit 0 Input. In Manual Span mode
(M-SPAN tied to V
DD
), pins S0, S1 and S2 are pin-strapped
to select a single fixed output range. These pins must be
tied to either GND or V
DD
even if they are unused.
S1 (Pin 21): Span Bit 1 Input. In Manual Span mode
(M-SPAN tied to V
DD
), pins S0, S1 and S2 are pin-strapped
to select a single fixed output range. These pins must be
tied to either GND or V
DD
even if they are unused.
S2 (Pin 22): Span Bit 2 Input. In Manual Span mode
(M-SPAN tied to V
DD
), pins S0, S1 and S2 are pin-strapped
to select a single fixed output range. These pins must be
tied to either GND or V
DD
even if they are unused.
LDAC (Pin 23): Asynchronous DAC Load Input. When LDAC
is logic low, the DAC is updated (CS/LD must be high).
V
OSADJ
(Pin 25): Offset Adjust Pin. This control pin
can be used to null unipolar offset or bipolar zero error.
The offset-voltage delta is inverted and attenuated such
that a 5V control voltage applied to V
OSADJ
produces
∆V
OS
= –2048 LSB in any output range (assumes a 5V
reference voltage at R
IN
). See System Offset and Gain
Adjustments in the Operation section. Tie to ground if
not used.
I
OUT1
(Pin 26): Current Output Pin. This pin is a virtual
ground when the DAC is operating and should reside at
0V. For normal operation tie to the negative input of the
I/V converter amplifier (see the Typical Applications sec-
tion).
R
FB
(Pins 27, 28): Feedback Resistor. For normal operation
tie both pins to the output of the I/V converter amplifier
(see the Typical Applications section). The DAC output
current from I
OUT1
flows through the feedback resistor
to the R
FB
pins.