Datasheet

LTC2756
10
2756f
block DiagraM
18-BIT DAC WITH SPAN SELECT
INPUT REGISTER
R
COM
R
IN
DAC REGISTER
SPAN
REGISTERS
CODE
REGISTERS
INPUT REGISTER
DAC REGISTER
R2
20k
R1
20k
R
OFS
REF
R
FB
27, 28
I
OUT1
V
OSADJ
2.56M
I
OUT2
2756 BD
POWER-ON
RESET
3
3
CONTROL AND READBACK LOGIC
18
18
26
25
3 2
GE
ADJ
4
V
DD
V
DD
7
SRO
12
RFLAG
18
14
5
GND
(6, 8, 13, 15, 16, 24)
M-SPAN S0 S1 S2 LDAC
23
CS/LD
9
SDI
10
SCK
11
CLR
1719 20 21 22
1