Datasheet

LTC2656
9
2656fa
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltages are with respect to GND.
Note 3: Linearity and monotonicity are defined from code kL to code
2
N
– 1, where N is the resolution and kL is the lower end code for which
no output limiting occurs. For V
REF
= 2.5V and N = 16, kL = 128 and
linearity is defined from code 128 to code 65535. For V
REF
= 2.5V and
N = 12, kL = 8 and linearity is defined from code 8 to code 4,095.
Note 4: Inferred from measurement at code 128 (LTC2656-16) or code 8
(LTC2656-12).
Note 5: DC crosstalk is measured with V
CC
= 5V and using internal
reference with the measured DAC at mid-scale.
Note 6: This IC includes current limiting that is intended to protect the
device during momentary overload conditions. Junction temperature can
exceed the rated maximum during current limiting. Continuous operation
above the specified maximum operating junction temperature may impair
device reliability.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CC
= 2.7V to 5.5V
t
1
SDI Valid to SCK Setup
l
4 ns
t
2
SDI Valid to SCK Hold
l
4 ns
t
3
SCK High Time
l
9 ns
t
4
SCK Low Time
l
9 ns
t
5
CS/LD Pulse Width
l
10 ns
t
6
LSB SCK High to CS/LD High
l
7 ns
t
7
CS/LD Low to SCK High
l
7 ns
t
8
SDO Propagation Delay from SCK Falling Edge C
LOAD
= 10pF
V
CC
= 4.5V to 5.5V
V
CC
= 2.7V to 4.5V
l
l
20
45
ns
ns
t
9
CLR Pulse Width
l
20 ns
t
10
CS/LD High to SCK Positive Edge
l
7 ns
t
12
LDAC Pulse Width
l
15 ns
t
13
CS/LD High to LDAC High or Low Transition
l
200 ns
SCK Frequency 50% Duty Cycle
l
50 MHz
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. LTC2656B-L16/LTC2656C-L16/LTC2656-L12/LTC2656B-H16/LTC2656-H12
(see Figure 1).
Note 7: Temperature coefficient is calculated by dividing the maximum
change in output voltage by the specified temperature range.
Note 8: Digital inputs at 0V or V
CC
.
Note 9: Guaranteed by design and not production tested.
Note 10: Internal reference mode. DAC is stepped 1/4 scale to 3/4 scale
and 3/4 scale to 1/4 scale. Load is 2kΩ in parallel with 200pF to GND.
Note 11: V
CC
= 5V, internal reference mode. DAC is stepped ±1LSB
between half scale and half scale – 1LSB. Load is 2k in parallel with 200pF
to GND.
Note 12: DAC-to-DAC crosstalk is the glitch that appears at the output
of one DAC due to a full-scale change at the output of another DAC. It is
measured with V
CC
= 5V and using internal reference, with the measured
DAC at mid-scale.
Note 13: Gain error specification may be degraded for reference input
voltages less than 1V. See Gain Error vs Reference Input Voltage curve in
the Typical Performance Characteristics section.