Datasheet

LTC2633
16
2633fb
operation
The LTC2633 is a family of dual voltage output DACs in an
8-lead TSOT package. Each DAC can operate rail-to-rail
using an external reference, or with its full-scale voltage
set by an integrated reference. Eighteen combinations of
accuracy (12-, 10-, and 8-bit), power-on reset value (zero-
scale, mid-scale in internal reference mode, or mid-scale
in external reference mode), DAC power-down output load
(high impedance or 200kΩ), and full-scale voltage (2.5V
or 4.096V) are available. The LTC2633 is controlled using
a 2-wire I
2
C interface.
Power-On Reset
The LTC2633-HZ/LTC2633-LZ clear the output to zero-scale
when power is first applied, making system initialization
consistent and repeatable.
For some applications, downstream circuits are active dur-
ing DAC power-up, and may be sensitive to nonzero outputs
from the DAC during this time. The LTC2633 contains
circuitry to reduce the power-on glitch: the analog output
typically rises less than 10mV above zero scale during
power-on. In general, the glitch amplitude decreases as the
power supply ramp time is increased. See power-on reset
glitch in the Typical Performance Characteristics section.
The LTC2633-HI/LTC2633-LI/LTC2633-LX provide an
alternative reset, setting the output to mid-scale when
power is first applied. The LTC2633-LI/ and LTC2633-HI
power up in internal reference mode, with the output set
to a mid-scale voltage of 1.25V and 2.048V respectively.
The LTC2633-LX power-up in external reference mode, with
the output set to mid-scale of the external reference. The
LTC2633-LO powers up in internal reference mode with
all the DAC channels placed in the high impedance state
(powered down). Input and DAC registers are set to the
mid-scale code, and only the internal reference is powered
up, causing supply current to be typically 180µA upon
power up. Default reference mode selection is described
in the Reference Modes section.
Power Supply Sequencing
The voltage at REF (Pin 3) must be kept within the range
–0.3V ≤ V
REF
≤ V
CC
+ 0.3V (see Absolute Maximum Rat-
ings). Particular care should be taken to observe these
limits during power supply turn-on and turn-off sequences,
when the voltage at V
CC
is in transition.
Transfer Function
The digital-to-analog transfer function is:
V
OUT(IDEAL)
=
k
2
N
V
REF
where k is the decimal equivalent of the binary DAC input
code, N is the resolution, and V
REF
is either 2.5V (LTC2633-LI/
LTC2633-LX/LTC2633-LO/LTC2633-LZ) or 4.096V
(LTC2633-HI/LTC2633-HZ) when in internal reference
mode, and the voltage at REF when in external reference
mode.
I
2
C Serial Interface
The LTC2633 communicates with a host using the stan-
dard 2-wire I
2
C interface. The Timing Diagram (Figures
1 and 2) show the timing relationship of the signals on
the bus. The two bus lines, SDA and SCL, must be high
when the bus is not in use. External pull-up resistors or
current sources are required on these lines. The value of
these pull-up resistors is dependent on the power supply
and can be obtained from the I
2
C specifications. For an
I
2
C bus operating in the fast mode, an active pull-up will
be necessary if the bus capacitance is greater than 200pF.
The LTC2633 is a receive-only (slave) device. The master
can write to the LTC2633. The LTC2633 will not acknowl-
edge (NAK) a read request from the master.