LTC2632
16
2632fa
BLOCK DIAGRAM
TIMING DIAGRAM
REGISTER
INTERNAL
REFERENCE
REGISTER
REGISTER
POWER-ON
RESET
32-BIT SHIFT REGISTER
REGISTER
CONTROL
LOGIC
DECODE
SCK
REF
V
REF
2632 BD
CS/LD
SDI
V
OUTA
V
CC
V
OUTB
DAC A
DAC B
SWITCH
GND
SDI
CS/LD
SCK
t
2
t
10
t
5
t
7
t
6
t
1
t
3
t
4
1 2 3 23 24
2632 F01
Figure 1. Serial Interface Timing
