Datasheet

LTC2499
30
2499fd
Using the 2X speed mode of the LTC2499 alters the rejection
characteristics around DC and multiples of f
S
. The device
bypasses the offset calibration in order to increase the output
rate. The resulting rejection plots are shown in Figures 27
and 28. 1x type frequency rejection can be achieved us-
ing the 2x mode by performing a running average of the
previous two conversion results (see Figure 29).
Output Data Rate
When using its internal oscillator, the LTC2499 produces
up to 7.5 samples per second (sps) with a notch frequency
of 60Hz. The actual output data rate depends upon the length
of the sleep and data output cycles which are controlled
by the user and can be made insignificantly short. When
operating with an external conversion clock (f
O
connected
to an external oscillator), the LTC2499 output data rate
can be increased. The duration of the conversion cycle is
41036/f
EOSC
. If f
EOSC
= 307.2kHz, the converter behaves
as if the internal oscillator is used.
An increase in f
EOSC
over the nominal 307.2kHz will trans-
late into a proportional increase in the maximum output
data rate (up to a maximum of 100sps). The increase in
output rate leads to degradation in offset, full-scale error,
and effective resolution as well as a shift in frequency
rejection. When using the integrated temperature sensor,
the internal oscillator should be used or an external oscil-
lator f
EOSC
= 307.2kHz maximum.
A change in f
EOSC
results in a proportional change in the
internal notch position. This leads to reduced differential
mode rejection of line frequencies. The common mode
rejection of line frequencies remains unchanged, thus fully
differential input signals with a high degree of symmetry
on both the IN
+
and IN
–
pins will continue to reject line
frequency noise.
An increase in f
EOSC
also increases the effective dynamic
input and reference current. External RC networks will
continue to have zero differential input current, but the
time required for complete settling (580ns for f
EOSC
=
307.2kHz) is reduced, proportionally.
Once the external oscillator frequency is increased above
1MHz (a more than 3x increase in output rate) the effective-
ness of internal auto calibration circuits begins to degrade.
This results in larger offset errors, full-scale errors, and
decreased resolution, as seen in Figures 30-37.
Figure 27. Input Normal Mode Rejection 2x Speed Mode Figure 28. Input Normal Mode Rejection 2x Speed Mode
applications inForMation
INPUT SIGNAL FREQUENCY (f
N
)
INPUT NORMAL REJECTION (dB)
2499 F27
0
–20
–40
–60
–80
–100
–120
0
f
N
2f
N
3f
N
4f
N
5f
N
6f
N
7f
N
8f
N
INPUT SIGNAL FREQUENCY (f
N
)
INPUT NORMAL REJECTION (dB)
2499 F28
0
–20
–40
–60
–80
–100
–120
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