Datasheet

LTC2497
4
2497fa
i
2
c inpuTs anD DigiTal ouTpuTs
The l denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IH
High Level Input Voltage
l
0.7V
CC
V
V
IL
Low Level Input Voltage
l
0.3V
CC
V
V
IHA
High Level Input Voltage for Address Pins CA0, CA1, CA2,
and Pin f
O
l
0.95V
CC
V
V
ILA
Low Level Input Voltage for Address Pins CA0, CA1, CA2
l
0.05V
CC
V
R
INH
Resistance from CA0, CA1, CA2 to V
CC
to Set Chip Address
Bit to 1
l
10
kW
R
INL
Resistance from CA0, CA1, CA2 to GND to Set Chip Address
Bit to 0
l
10
kW
R
INF
Resistance from CA0, CA1, CA2 to GND or V
CC
to Set Chip
Address Bit to Float
l
2
MW
I
I
Digital Input Current
l
–10 10 µA
V
HYS
Hysteresis of Schmidt Trigger Inputs (Note 5)
l
0.05V
CC
V
V
OL
Low Level Output Voltage (SDA) I = 3mA
l
0.4 V
t
OF
Output Fall Time V
IH(MIN)
to V
IL(MAX)
Bus Load C
B
10pF to
400pF (Note 14)
l
20 + 0.1C
B
250 ns
I
IN
Input Leakage 0.1V
CC
≤ V
IN
≤ V
CC
l
1 µA
C
CAX
External Capacitative Load on Chip Address Pins (CA0, CA1,
CA2) for Valid Float
l
10 pF
power requireMenTs
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CC
Supply Voltage
l
2.7 5.5 V
I
CC
Supply Current Conversion Current (Note 11)
Sleep Mode (Note 11)
l
l
160
1
275
2
µA
µA
analog inpuT anD reFerence
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
I
DC_LEAK(IN
–
)
IN
–
DC Leakage Current Sleep Mode, IN
–
= GND
l
–10 1 10 nA
I
DC_LEAK(REF
+
)
REF
+
DC Leakage Current Sleep Mode, REF
+
= V
CC
l
–100 1 100 nA
I
DC_LEAK(REF
–
)
REF
–
DC Leakage Current Sleep Mode, REF
–
= GND
l
–100 1 100 nA
t
OPEN
MUX Break-Before-Make 50 ns
QIRR MUX Off Isolation V
IN
= 2V
P-P
DC to 1.8MHz 120 dB