Datasheet
LTC2496
17
2496fb
Table 4. Serial Interface Timing Modes
CONFIGURATION
SCK
SOURCE
CONVERSION
CYCLE CONTROL
DATA OUTPUT
CONTROL
CONNECTION AND
WAVEFORMS
External SCK, Single Cycle
Conversion
External CS and SCK CS and SCK Figures 4, 5
External SCK, 3-Wire I/O External SCK SCK Figure 6
Internal SCK, Single Cycle
Conversion
Internal
CS↓ CS↓
Figures 7, 8
Internal SCK, 3-Wire I/O,
Continuous Conversion
Internal Continuous Internal Figure 9
applicaTions inForMaTion
External Serial Clock, Single Cycle Operation
This timing mode uses an external serial clock to shift out
the conversion result and CS to monitor and control the
state of the conversion cycle, see Figure 4.
The external serial clock mode is selected during the power-
up sequence and on each falling edge of CS. In order to
enter and remain in the external SCK mode of operation,
SCK must be driven LOW both at power up and on each
CS falling edge. If SCK is HIGH on the falling edge of CS,
the device will switch to the internal SCK mode.
The serial data output pin (SDO) is Hi-Z as long as CS is
HIGH. At any time during the conversion cycle, CS may be
pulled LOW in order to monitor the state of the converter.
While CS is LOW, EOC is output to the SDO pin.
EOC = 1 while a conversion is in progress and EOC = 0 if
the conversion is complete and the device is in the sleep
state. Independent of CS, the device automatically enters
the sleep state once the conversion is complete; however,
in order to reduce the power, CS must be HIGH.
10µF
0.1µF
2.7V TO 5.5V
Hi-Z
2496 F04
CS
SCK
(EXTERNAL)
SDI
SDO
CONVERSION SLEEP DATA INPUT/OUTPUT CONVERSION
V
CC
f
O
REF
+
REF
–
CH0
CH7
CH8
CH15
COM
SCK
SDI
SDO
CS
GND
28 35
29
30
8
15
16
23
7
38
37
1,3,4,5,6,31,32,33,39
36
34
REFERENCE
VOLTAGE
0.1V TO V
CC
ANALOG
INPUTS
= EXTERNAL OSCILLATOR
= INTERNAL OSCILLATOR
LTC2496
4-WIRE
SPI INTERFACE
•
•
•
•
•
•
•
•
•
•
•
•
EOC
1 2 3 4 5 6 7 8 9 19 20 21 22 23 24
1 0 EN SGL A2 A1 A0ODD
DON'T CAREDON'T CARE
MSBSIG“0”
LSB
BIT 23 BIT 22 BIT 21 BIT 20 BIT 19 BIT 18 BIT 17 BIT 16 BIT 15 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
Figure 4. External Serial Clock, Single Cycle Operation