Datasheet

LTC2495
25
2495fd
independent of external settling errors. This allows direct
digitization of high impedance sensors without the need
for buffers.
The switching algorithm forces the average input current
on the positive input (I
IN
+
) to be equal to the average input
current on the negative input (I
IN
–
). Over the complete
conversion cycle, the average differential input current
(I
IN
+
– I
IN
–
) is zero. While the differential input current is
zero, the common mode input current (I
IN
+
+ I
IN
–
)/2 is
proportional to the difference between the common mode
input voltage (V
IN(CM)
) and the common mode reference
voltage (V
REF(CM)
).
In applications where the input common mode voltage is
equal to the reference common mode voltage, as in the
case of a balanced bridge, both the differential and com-
mon mode input current are zero. The accuracy of the
converter is not compromised by settling errors.
In applications where the input common mode voltage is
constant but different from the reference common mode
voltage, the differential input current remains zero while
the common mode input current is proportional to the
difference between V
IN(CM)
and V
REF(CM)
. For a reference
common mode voltage of 2.5V and an input common mode
of 1.5V, the common mode input current is approximately
0.74µA (in simultaneous 50Hz/60Hz rejection mode). This
common mode input current does not degrade the accuracy
if the source impedances tied to IN
+
and IN
–
are matched.
Mismatches in source impedance lead to a fixed offset
error but do not effect the linearity or full-scale reading.
A 1% mismatch in a 1k source resistance leads to a 74µV
shift in offset voltage.
In applications where the common mode input voltage
varies as a function of the input signal level (single-ended
type sensors), the common mode input current varies
proportionally with input voltage. For the case of balanced
input impedances, the common mode input current effects
are rejected by the large CMRR of the LTC2495, leading
to little degradation in accuracy. Mismatches in source
impedances lead to gain errors proportional to the dif-
ference between the common mode input and common
mode reference. A 1% mismatch in 1k source resistances
lead to gain errors on the order of 15ppm. Based on the
stability of the internal sampling capacitors and the ac-
curacy of the internal oscillator, a one-time calibration will
remove this error.
In addition to the input sampling current, the input ESD
protection diodes have a temperature dependent leakage
Figure 12. External Buffers Provide High Impedance Inputs
and Amplifier Offsets are Automatically Cancelled
applications inForMation
–
+
–
+
1/2 LTC6078
1/2 LTC6078
1
2
3
5
6
7
$3 ADC
WITH
EASY DRIVE
INPUTS
INPUT
MUX
MUXOUTP MUXOUTN
17
2495 F12
LTC2495
ANALOG
INPUTS
SCL
SDA
0.1µF
1k
1k
0.1µF