Datasheet
LTC2495
22
2495fd
Figure 6. Conversion Sequence
Figure 7. Consecutive Reading with the Same Input/Configuration
Table 6. Address Assignment
CA2 CA1 CA0 ADDRESS
LOW LOW LOW 0010100
LOW LOW HIGH 0010110
LOW LOW Float 0010101
LOW HIGH LOW 0100110
LOW HIGH HIGH 0110100
LOW HIGH Float 0100111
LOW Float LOW 0010111
LOW Float HIGH 0100101
LOW Float Float 0100100
HIGH LOW LOW 1010110
HIGH LOW HIGH 1100100
HIGH LOW Float 1010111
HIGH HIGH LOW 1110100
HIGH HIGH HIGH 1110110
HIGH HIGH Float 1110101
HIGH Float LOW 1100101
HIGH Float HIGH 1100111
HIGH Float Float 1100110
Float LOW LOW 0110101
Float LOW HIGH 0110111
Float LOW Float 0110110
Float HIGH LOW 1000111
Float HIGH HIGH 1010101
Float HIGH Float 1010100
Float Float LOW 1000100
Float Float HIGH 1000110
Float Float Float 1000101
applications inForMation
Operation Sequence
The LTC2495 acts as a transmitter or receiver, as shown
in Figure 6. The device may be programmed to perform
several functions. These include input channel selection,
measure the internal temperature, selecting the line fre-
quency rejection (50Hz, 60Hz, or simultaneous 50Hz and
60Hz), a 2x speed mode and gain.
Continuous Read
In applications where the input channel/configuration does
not need to change for each cycle, the conversion can be
continuously performed and read without a write cycle
(see Figure 7). The configuration/input channel remains
unchanged from the last value written into the device. If
the device has not been written to since power up, the
configuration is set to the default value. At the end of a
read operation, a new conversion automatically begins.
At the conclusion of the conversion cycle, the next result
may be read using the method described above. If the
conversion cycle is not concluded and a valid address
selects the device, the LTC2495 generates a NACK signal
indicating the conversion cycle is in progress.
Continuous Read/Write
Once the conversion cycle is concluded, the LTC2495
can be written to and then read from using the repeated
START (Sr) command.
Figure 8 shows a cycle which begins with a data write, a
repeated START, followed by a read and concluded with a
STOP command. The following conversion begins after all
S ACK DATA Sr DATA TRANSFERRING P
SLEEP DATA INPUT/OUTPUT CONVERSIONCONVERSION
7-BIT ADDRESS
R/W
2495 F05
7-BIT ADDRESS
CONVERSION CONVERSION
CONVERSION
SLEEP SLEEPDATA OUTPUT DATA OUTPUT
7-BIT ADDRESSS SR RACK ACKREAD READP P
2495 F07