Datasheet

LTC2493
21
2493fd
7-BIT ADDRESS 7-BIT ADDRESSS SR RACK ACKREAD READP P
2493 F07
CONVERSION CONVERSIONCONVERSIONSLEEP DATA OUTPUTDATA INPUT SLEEP
7-BIT ADDRESS 7-BIT ADDRESSS RW ACK ACKWRITE Sr PREAD
2493 F08
CONVERSION CONVERSIONADDRESSSLEEP DATA OUTPUTDATA INPUT
7-BIT ADDRESSS W ACK WRITE (OPTIONAL) P
2493 F09
CONVERSION CONVERSIONSLEEP DATA INPUT
Figure 7. Consecutive Reading with the Same Input/Configuration
Figure 8. Write, Read, START Conversion
Figure 9. Start a New Conversion Without Reading Old Conversion Result
applicaTions inForMaTion
Continuous Read/Write
Once the conversion cycle is concluded, the LTC2493
can be written to and then read from using the repeated
START (Sr) command.
Figure 8 shows a cycle which begins with a data write, a
repeated START, followed by a read and concluded with a
STOP command. The following conversion begins after
all 32 bits are read out of the device or after a STOP com-
mand. The following conversion will be performed using the
newly programmed data. In cases where the same speed
(1×/2× mode) and rejection frequency (50Hz, 60Hz, 50Hz
and 60Hz) is used but the channel is changed, a STOP or
repeated START may be issued after the first byte (channel
selection data) is written into the device.
Discarding a Conversion Result and Initiating a New
Conversion with Optional Write
At the conclusion of a conversion cycle, a write cycle
can be initiated. Once the write cycle is acknowledged, a
STOP command will start a new conversion. If a new input
channel or conversion configuration is required, this data
can be written into the device and a STOP command will
initiate the next conversion (see Figure 9).