Datasheet
LTC2492
5
2492fd
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
f
EOSC
External Oscillator Frequency Range (Note 16)
●
10 4000 kHz
t
HEO
External Oscillator High Period
●
0.125 100 μs
t
LEO
External Oscillator Low Period
●
0.125 100 μs
t
CONV_1
Conversion Time for 1x Speed Mode 50Hz Mode
60Hz Mode
Simultaneous 50/60Hz Mode
External Oscillator
●
●
●
157.2
131
144.1
160.3
133.6
146.9
41036/f
EOSC
(in kHz)
163.5
136.3
149.9
ms
ms
ms
ms
t
CONV_2
Conversion Time for 2x Speed Mode 50Hz Mode
60Hz Mode
Simultaneous 50/60Hz Mode
External Oscillator
●
●
●
78.7
65.6
72.2
80.3
66.9
73.6
20556/f
EOSC
(in kHz)
81.9
68.2
75.1
ms
ms
ms
ms
f
ISCK
Internal SCK Frequency Internal Oscillator (Notes 10, 17)
External Oscillator (Notes 10, 11, 15)
38.4
f
EOSC
/8
kHz
kHz
D
ISCK
Internal SCK Duty Cycle (Notes 10, 17)
●
45 55 %
f
ESCK
External SCK Frequency Range (Notes 10, 11, 15)
●
4000 kHz
t
LESCK
External SCK Low Period (Notes 10, 11, 15)
●
125 ns
t
HESCK
External SCK High Period (Notes 10, 11, 15)
●
125 ns
t
DOUT_ISCK
Internal SCK 32-Bit Data Output Time Internal Oscillator (Notes 10, 17)
External Oscillator (Notes 10, 11, 15)
●
0.81 0.83
256/f
EOSC
(in kHz)
0.85 ms
ms
t
DOUT_ESCK
External SCK 32-Bit Data Output Time (Notes 10, 11, 15)
32/f
ESCK
(in kHz) ms
t
1
CS↓ to SDO Low
●
0 200 ns
t
2
CS↑ to SDO Hi-Z
●
0 200 ns
t
3
CS↓ to SCK↓
Internal SCK Mode
●
0 200 ns
t
4
CS↓ to SCK↑
External SCK Mode
●
50 ns
t
KQMAX
SCK↓ to SDO Valid
●
200 ns
t
KQMIN
SDO Hold After SCK↓
(Note 5)
●
15 ns
t
5
SCK Set Up Before CS↓
●
50 ns
t
7
SDI Set Up Before SCK↑
(Note 5)
●
100 ns
t
8
SDI Hold After SCK↑
(Note 5)
●
100 ns
DIGITAL INPUTS AND DIGITAL OUTPUTS
The ● denotes the specifi cations which apply over the
full operating temperature range, otherwise specifi cations are at T
A
= 25°C. (Note 3)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may
cause permanent damage to the device. Exposure to any Absolute Maximum
Rating condition for extended periods may affect device reliability and lifetime.
Note 2: All voltage values are with respect to GND.
Note 3: Unless otherwise specifi ed:
V
CC
= 2.7V to 5.5V
V
REFCM
= V
REF
/2, F
S
= 0.5V
REF
V
IN
= IN
+
– IN
–
, V
IN(CM)
= (IN
+
– IN
–
)/2,
where IN
+
and IN
–
are the selected input channels.
Note 4: Use internal conversion clock or external conversion clock source
with f
EOSC
= 307.2kHz unless other wise specifi ed.
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defi ned as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7: 50Hz mode (internal oscillator) or f
EOSC
= 256kHz ±2% (external
oscillator).
Note 8: 60Hz mode (internal oscillator) or f
EOSC
= 307.2kHz ±2% (external
oscillator).
Note 9: Simultaneous 50Hz/60Hz mode (internal oscillator) or
f
EOSC
= 280kHz ±2% (external oscillator).
Note 10: The SCK can be confi gured in external SCK mode or internal SCK
mode. In external SCK mode, the SCK pin is used as a digital input and the
driving clock is f
ESCK
. In the internal SCK mode, the SCK pin is used as a
digital output and the output clock signal during the data output is f
ISCK
.
Note 11: The external oscillator is connected to the f
O
pin. The external
oscillator frequency, f
EOSC
, is expressed in kHz.
Note 12: The converter uses its internal oscillator.
Note 13: The output noise includes the contribution of the internal
calibration operations.
Note 14: Guaranteed by design and test correlation.
Note 15: The converter is in external SCK mode of operation such that the
SCK pin is used as a digital input. The frequency of the clock signal driving
SCK during the data output is f
ESCK
and is expressed in Hz.
Note 16: Refer to Applications Information section for performance vs
data rate graphs.
Note 17: The converter in internal SCK mode of operation such that the
SCK pin is used as a digital output.
Note 18: For V
CC
< 3V, V
IH
is 2.5V for pin f
O
.