Datasheet
LTC2488
11
2488fa
APPLICATIONS INFORMATION
CONVERTER OPERATION
Converter Operation Cycle
The LTC2488 is a multi-channel, low power, delta-sigma,
analog-to-digital converter with an easy-to-use 4-wire
interface and automatic differential input current cancella-
tion. Its operation is made up of four states (See Figure 2).
The converter’s operating cycle begins with the conver-
sion, followed by the sleep state, and ends with the data
input/output cycle. The 4-wire interface consists of serial
data output (SDO), serial clock (SCK), chip select (
⎯
C
⎯
S)
and serial data input (SDI).The interface, timing, operation
cycle, and data output format is compatible with Linear’s
entire family of SPI ΔΣ converters.
Initially, at power up, the LTC2488 performs a conversion.
Once the conversion is complete, the device enters the
sleep state. While in the sleep state, if
⎯
C
⎯
S is HIGH, power
consumption is reduced by two orders of magnitude. The
part remains in the sleep state as long as
⎯
C
⎯
S is HIGH. The
conversion result is held indefi nitely in a static shift register
while the part is in the sleep state.
Once
⎯
C
⎯
S is pulled LOW, the device powers up, exits the
sleep state, and enters the data input/output state. If
⎯
C
⎯
S
is brought HIGH before the fi rst rising edge of SCK, the
device returns to the sleep state and the power is reduced.
If
⎯
C
⎯
S is brought HIGH after the fi rst rising edge of SCK, the
data output cycle is aborted and a new conversion cycle
begins. The data output corresponds to the conversion
just completed. This result is shifted out on the serial
data output pin (SDO) under the control of the serial
clock pin (SCK). Data is updated on the falling edge of
SCK allowing the user to reliably latch data on the rising
edge of SCK (See Figure 3). The channel selection data for
the next conversion is also loaded into the device at this
time. Data is loaded from the serial data input pin (SDI)
on each rising edge of SCK. The data input/output cycle
concludes once 24 bits are read out of the ADC or when
⎯
C
⎯
S is brought HIGH. The device automatically initiates a
new conversion and the cycle repeats.
Through timing control of the
⎯
C
⎯
S and SCK pins, the LTC2488
offers several fl exible modes of operation (internal or
external SCK and free-running conversion modes). These
various modes do not require programming and do not
disturb the cyclic operation described above. These modes
of operation are described in detail in the Serial Interface
Timing Modes section.
Ease of Use
The LTC2488 data output has no latency, fi lter settling
delay, or redundant data associated with the conversion
cycle. There is a one-to-one correspondence between the
conversion and the output data. Therefore, multiplexing
multiple analog inputs is straight forward. Each conversion,
immediately following a newly selected input, is valid and
accurate to the full specifi cations of the device.
The LTC2488 automatically performs offset and full
scale calibration every conversion cycle independent of
the input channel selected. This calibration is transpar-
ent to the user and has no effect on the operation cycle
described above. The advantage of continuous calibration
is extreme stability of offset and full-scale readings with
respect to time, supply voltage variation, input channel,
and temperature drift.
Easy Drive Input Current Cancellation
The LTC2488 combines a high precision, delta-sigma ADC
with an automatic, differential, input current cancellation
front end. A proprietary front end passive sampling network
transparently removes the differential input current. This
Figure 2. LTC2488 State Transition Diagram
CONVERT
SLEEP
CHANNEL SELECT
DATA OUTPUT
POWER UP
IN
+
= CH0, IN
–
= CH1
2488 F02
CS = LOW
AND
SCK