Datasheet

LTC2451
11
2451fg
The first bit is the MSB (D15) and is followed by succes-
sively less significant bits (D14, D13 ...) until the LSB (D0)
is output by the LTC2451. This sequence is summarized
in Figure 5.
OPERATION SEQUENCE
Continuous Read
Conversions from the LTC2451 can be continuously read
(see Figure 7). At the end of a read operation, a new
conversion automatically begins. At the conclusion of
the conversion cycle, the next result may be read using
the method described above. If the conversion cycle is
not concluded and a valid address selects the device, the
LTC2451 generates a NACK signal indicating the conver-
sion cycle is in progress.
Continuous Read/Write
Once the conversion cycle is concluded, the LTC2451
can be written to, and then read from, using the repeated
START (Sr) command.
Figure 7 shows a cycle which begins with a data write, a
repeated START, followed by a read, and concluded with a
STOP command. The following conversion begins after all
16 bits are read out of the device, or after the STOP com-
mand, and uses the newly programmed configuration.
APPLICATIONS INFORMATION
Figure 5. Conversion Sequence
SLEEP
7-BIT ADDRESS
(0010100)
S PR ACK READ
DATA OUTPUT CONVERSIONCONVERSION
2451 F05
Figure 7. Write, Read, START Conversion
Figure 6. Consecutive Reading at the Same Configuration
SLEEP
7-BIT ADDRESS
(0010100)
S PPR ACK READ
DATA OUTPUT CONVERSIONCONVERSION
2451 F06
SLEEP
7-BIT ADDRESS
(0010100)
S PR ACK READ
DATAOUTPUT CONVERSION
SLEEP
7-BIT ADDRESS
(0010100)
7-BIT ADDRESS
(0010100)
S RSrW ACK WRITE
DATA OUTPUTDATA INPUT ADDRESS CONVERSIONCONVERSION
2451 F07
PACK READ