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LTC2450-1

24501fc

FEATURES

APPLICATIONS

DESCRIPTION

Easy-to-Use, Ultra-Tiny

16-Bit Δ∑ ADC

The LTC

2450-1 is a low power, ultra-tiny 16-bit analog-

to-digital converter designed for space constrained ap-

plications requiring 16-bit performance. The LTC2450-1

uses a single 2.7V to 5.5V supply, accepts a single-ended

analog input voltage, and communicates through an SPI

interface. It includes an integrated oscillator that does

not require any external components. The delta-sigma

modulator converter core provides single-cycle settling

time for multiplexed applications. The converter is avail-

able in a 6-pin, 2mm × 2mm DFN package. The LTC2450-1

implements a proprietary input sampling scheme that

reduces the average input sampling current several orders

of magnitude.

The LTC2450-1 is capable of up to 60 conversions per

second and, due to the very large oversampling ratio, has

extremely relaxed antialiasing requirements. The converter

uses its power supply voltage as the reference voltage and

the single-ended, rail-to-rail input voltage range extends

from GND to V

Following a conversion, the LTC2450-1 can automatically

enter a sleep mode and reduce its power to less than

500nA. At an output rate of 1Hz, the LTC2450-1 consumes

an average of less than 25μW from a 2.7V supply.

GND to V

Single-Ended Input Range

60 Conversions Per Second

0.02LSB RMS Noise

16-Bits, No Missing Codes

0.5mV Offset Error

4LSB Full-Scale Error

Single Conversion Settling Time for Multiplexed

Applications

Single Cycle Operation with Auto Shutdown

350μA Supply Current

50nA Sleep Current

Internal Oscillator—No External Components

Required

Single Supply, 2.7V to 5.5V Operation

SPI Interface

Ultra-Tiny, 2mm × 2mm DFN Package

System Monitoring

Environmental Monitoring

Direct Temperature Measurements

Instrumentation

Industrial Process Control

Data Acquisition

Embedded ADC Upgrades

Integral Nonlinearity

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Easy Drive

is a trademark of Linear Technology Corporation. All other trademarks are the property of their

respective owners. Protected by U.S. Patents including 6208279, 6411242, 7088280, 7164378.

SENSE

SCK

3-WIRE SPI

INTERFACE

SDO

LTC2450-1

GND

0.1μF

10μF

2.7 TO 5.5V

CLOSE TO

CHIP

24501 TA01

INPUT VOLTAGE (V)

–3.0

INL (LSB)

–2.0

–1.0

1.0

3.0

0.5

1.0 1.5 2.0

24501 G02

2.5 3.0

2.0

–2.5

–1.5

–0.5

0.5

2.5

1.5

= V

REF

= 3V

= –45°C, 25°C, 90°C

TYPICAL APPLICATION

Summary of content (20 pages)

PAGE 1
LTC2450-1 Easy-to-Use, Ultra-Tiny 16-Bit Δ∑ ADC DESCRIPTION FEATURES n n n n n n n n n n n n n n GND to VCC Single-Ended Input Range 60 Conversions Per Second 0.02LSB RMS Noise 16-Bits, No Missing Codes 0.5mV Offset Error 4LSB Full-Scale Error Single Conversion Settling Time for Multiplexed Applications Single Cycle Operation with Auto Shutdown 350μA Supply Current 50nA Sleep Current Internal Oscillator—No External Components Required Single Supply, 2.7V to 5.
PAGE 2
LTC2450-1 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2) Supply Voltage (VCC) ...................................– 0.3V to 6V Analog Input Voltage (VIN) ........... – 0.3V to (VCC + 0.3V) Digital Input Voltage..................... – 0.3V to (VCC + 0.3V) Digital Output Voltage .................. – 0.3V to (VCC + 0.3V) Operating Temperature Range LTC2450C-1 ............................................. 0°C to 70°C LTC2450I-1 ..........................................
PAGE 3
LTC2450-1 POWER REQUIREMENTS The l denotes the speciﬁcations which apply over the full operating temperature range,otherwise speciﬁcations are at TA = 25°C. SYMBOL PARAMETER VCC Supply Voltage ICC Supply Current Conversion Sleep CONDITIONS MIN l CS = GND (Note 6) CS = VCC (Note 6) TYP 2.7 l l 350 0.05 MAX UNITS 5.5 V 600 0.
PAGE 4
LTC2450-1 TYPICAL PERFORMANCE CHARACTERISTICS VCC = VREF = 5V 2.0 2.0 1.5 1.5 1.0 1.0 0.5 0 TA = –45°C, 25°C, 90°C –0.5 VCC = VREF = 3V 4.0 3.5 TA = –45°C, 25°C, 90°C 0 –0.5 –1.0 –1.5 –1.5 –2.0 –2.0 –2.5 –2.5 –3.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 INPUT VOLTAGE (V) 4.5 0.5 –1.0 –3.0 Maximum INL vs Temperature 5.0 2.5 INL (LSB) INL (LSB) 2.5 Integral Nonlinearity 3.0 INL (LSB) Integral Nonlinearity 3.0 Offset Error vs Temperature 0.5 0 0.5 2.5 1.0 1.5 2.
PAGE 5
LTC2450-1 TYPICAL PERFORMANCE CHARACTERISTICS Average Supply Power vs Temperature, VCC = 3V Sleep Mode Power Supply Current vs Temperature AVERAGE SUPPLY POWER (μW) 10000 200 VCC = 5V 150 VCC = 4.
PAGE 6
LTC2450-1 PIN FUNCTIONS VCC (Pin 1): Positive Supply Voltage and Converter Reference Voltage. Bypass to GND (Pin 3) with a 10μF capacitor in parallel with a low series inductance 0.1μF capacitor located as close to the part as possible. VIN (Pin 2): Analog Input Voltage. GND (Pin 3): Ground. Connect to a ground plane through a low impedance connection. CS (Pin 4): Chip Select (Active LOW) Digital Input. A LOW on this pin enables the SDO digital output.
PAGE 7
LTC2450-1 APPLICATIONS INFORMATION CONVERTER OPERATION Converter Operation Cycle The LTC2450-1 is a low power, delta-sigma analog-todigital converter with a simple 3-wire interface (see Figure 1). Its operation is composed of three successive states: CONVERT, SLEEP and DATA OUTPUT. The operating cycle begins with the CONVERT state, is followed by the SLEEP state, and ends with the DATA OUTPUT state (see Figure 2).
PAGE 8
LTC2450-1 APPLICATIONS INFORMATION Ease of Use Input Voltage Range The LTC2450-1 data output has no latency, ﬁlter settling delay or redundant results associated with the conversion cycle. There is a one-to-one correspondence between the conversion and the output data. Therefore, multiplexing multiple analog input voltages requires no special actions. The ADC is capable of digitizing true rail-to-rail input signals.
PAGE 9
LTC2450-1 APPLICATIONS INFORMATION Conversion Status Monitor Serial Interface Operation Modes For certain applications, the user may wish to monitor the LTC2450-1 conversion status. This can be achieved by holding SCK HIGH during the conversion cycle. In this condition, whenever the CS input pin is pulled low (CS = LOW), the SDO output pin will provide an indication of the conversion status.
PAGE 10
LTC2450-1 APPLICATIONS INFORMATION Serial Clock Idle-High (CPOL = 1) Examples the falling edge of the serial clock (SCK). A 17th clock pulse is used to trigger a new conversion cycle. In Figure 5, following a conversion cycle the LTC2450-1 automatically enters the low power sleep mode. The user can monitor the conversion status at convenient intervals using CS and SDO.
PAGE 11
LTC2450-1 APPLICATIONS INFORMATION CS SD0 D15 D14 D13 clk1 clk2 clk3 D12 D2 D1 D0 clk15 clk16 SCK CONVERT SLEEP clk4 clk14 DATA OUTPUT CONVERT 24501 F07 LOW ICC Figure 7. Idle-Low (CPOL = 0) Clock. CS Triggers a New Conversion CS SD0 D15 D14 clk1 clk2 D13 D12 D2 D1 clk14 clk15 D0 SCK CONVERT SLEEP LOW ICC clk3 clk4 DATA OUTPUT clk16 CONVERT 24501 F08 Figure 8. Idle-Low (CPOL = 0) Clock.
PAGE 12
LTC2450-1 APPLICATIONS INFORMATION CS SD0 D15 D14 D13 SCK clk1 CONVERT SLEEP clk2 clk3 clk4 DATA OUTPUT CONVERT 24501 F09 LOW ICC Figure 9. Idle-High (CPOL = 1) Clock and Aborted I/O Example CS SD0 D15 D14 clk1 clk2 D13 SCK CONVERT SLEEP DATA OUTPUT clk3 CONVERT LOW ICC 24501 F10 Figure 10. Idle-Low (CPOL = 0) Clock and Aborted I/O Example CS SD0 D15 SCK = LOW CONVERT SLEEP DATA OUTPUT CONVERT LOW ICC 24501 F11 Figure 11.
PAGE 13
LTC2450-1 APPLICATIONS INFORMATION 2-Wire Operation status cannot be monitored at the SDO output. Following a conversion cycle, the LTC2450-1 bypasses the SLEEP state and immediately enters the DATA OUTPUT state. At this moment the SDO pin outputs the most signiﬁcant bit (D15) of the conversion result. The user must use external timing in order to determine the end of conversion and result availability. Subsequently 16 clock pulses are applied to SCK in order to serially shift the 16-bit result.
PAGE 14
LTC2450-1 APPLICATIONS INFORMATION Digital Signal Levels The LTC2450-1’s digital interface is easy to use. Its digital inputs (SCK and CS) accept standard CMOS logic levels and the internal hysteresis receivers can tolerate edge rates as slow as 100μs. However, some considerations are required to take advantage of the exceptional accuracy and low supply current of this converter. The digital output signal SDO is less of a concern because it is not active during the conversion cycle.
PAGE 15
LTC2450-1 APPLICATIONS INFORMATION elements which reduce the ADC performance sensitivity to PCB layout and external components. Nevertheless, the very high accuracy of this converter is best preserved by careful low and high frequency power supply decoupling. layout CPAR has typical values between 2pF and 15pF. In addition, the equivalent circuit of Figure 15 includes the converter equivalent internal resistor RSW and sampling capacitor CEQ. A 0.
PAGE 16
LTC2450-1 APPLICATIONS INFORMATION For most applications, it is desirable to implement CIN as a high quality 0.1μF ceramic capacitor and RS ≤ 1k. This capacitor should be located as close as possible to the actual VIN package pin. Furthermore the area encompassed by this circuit path as well as the path length should be minimized.
PAGE 17
LTC2450-1 APPLICATIONS INFORMATION Signal Bandwidth and Noise Equivalent Input Bandwidth The LTC2450-1 includes a sinc1 type digital ﬁlter with the ﬁrst notch located at f0 = 60Hz. As such the 3dB input signal bandwidth is 26.54Hz. The calculated LTC2450-1 input signal attenuation with frequency at low frequencies is shown in Figure 18. The LTC2450-1 input signal attenuation with frequency over a wide frequency range is shown in Figure 19. The converter noise level is about 1.
PAGE 18
LTC2450-1 TYPICAL APPLICATION Thermistor Measurement 5V VCC 10k VIN THERMISTOR 1k TO 10k CS SCK LTC2450-1 SDO 100nF GND 24501 TA02 24501fc 18
PAGE 19
LTC2450-1 PACKAGE DESCRIPTION DC Package 6-Lead Plastic DFN (2mm × 2mm) (Reference LTC DWG # 05-08-1703) 0.675 ±0.05 2.50 ±0.05 1.15 ±0.05 0.61 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 1.42 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 0.56 ± 0.05 (2 SIDES) 0.38 ± 0.05 4 6 2.00 ±0.10 (4 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) PIN 1 CHAMFER OF EXPOSED PAD 3 0.200 REF 0.75 ±0.05 1 (DC6) DFN 1103 0.25 ± 0.05 0.50 BSC 1.37 ±0.05 (2 SIDES) 0.00 – 0.
PAGE 20
LTC2450-1 TYPICAL APPLICATIONS Easy Active Input Easy Passive Input PRECONDITIONED SENSOR WITH VOLTAGE OUTPUT V+ RS < 10k 1k VOUT LTC2450-1 LTC2450-1 GND 100nF 100nF 24501 TA04 24501 TA05 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT®1236A-5 Precision Bandgap Reference, 5V 0.05% Maximum, 5ppm/°C Drift LT1461 Micropower Series Reference, 2.5V 0.