Datasheet

LTC2444/LTC2445/
LTC2448/LTC2449
11
2444589fc
For more information www.linear.com/LTC2444
required for all 16 input channels. Additionally, the transpar-
ent calibration feature of the LTC244X family automatically
removes the offset errors of the external buffer.
In order to achieve optimum performance, the MUXOUT
and ADCIN pins should not be shorted together. In applica
-
tions where the MUXOUT and ADCIN need to be shorted
together
, the LTC2444/LTC2448 should be used because
the MUXOUT and ADCIN are internally connected for
optimum per
formance.
Output Data Format
The LTC2444/LTC2445/LTC2448/LTC2449 serial output
data stream is 32 bits long. The first 3 bits represent sta
-
tus information indicating the sign and conversion state.
The next 24 bits are the conversion result, MSB first. The
remaining 5 bits are sub LSBs beyond the 24-bit level that
may be included in averaging or discarded without loss of
resolution. In the case of ultrahigh resolution modes, more
than 24 effective bits of per
formance are possible (see
Table 5). Under these conditions, sub LSBs are included
in the conversion result and represent useful information
beyond the 24-bit level. The third and fourth bit together
are also used to indicate an underrange condition (the
differential input voltage is below –FS) or an overrange
condition (the differential input voltage is above +FS).
Bit 31 (first output bit) is the end of conversion (EOC)
indicator. This bit is available at the SDO pin during the
conversion and sleep states whenever the CS pin is LOW.
This bit is HIGH during the conversion and goes LOW
when the conversion is complete.
Bit 30 (second output bit) is a dummy bit (DMY) and is
always LOW.
Bit 29 (third output bit) is the conversion result sign
indicator (SIG). If V
IN
is >0, this bit is HIGH. If V
IN
is <0,
this bit is LOW.
Bit 28 (fourth output bit) is the most significant bit (MSB) of
the result. This bit in conjunction with Bit 29 also provides
the underrange or overrange indication. If both Bit 29 and
Bit 28 are HIGH, the differential input voltage is above +FS.
If both Bit 29 and Bit 28 are LOW, the differential input
voltage is below –FS.
applicaTions inForMaTion
V
CC
+ 0.3V
GND
GND
GND
–0.3V
GND
–0.3V
–0.3V
(a) Arbitrary (b) Fully Differential
(d) Pseudo-Differential Unipolar
IN– or COM Grounded
(c) Pseudo Differential Bipolar
IN– or COM Biased
V
REF
2
V
REF
2
V
REF
2
V
REF
2
V
REF
2
–V
REF
2
–V
REF
2
–V
REF
2
Selected IN
+
Ch
Selected IN
–
Ch or COM
V
CC
V
CC
2444589 F04
V
CC
V
CC
Figure 4. Input Range