Datasheet

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LTC2424/LTC2428

4-/8-Channel 20-Bit µPower

No Latency ∆Σ

ADCs

The LTC

2424/LTC2428 are 4-/8-channel 2.7V to 5.5V

micropower 20-bit A/D converters with an integrated

oscillator, 8ppm INL and 1.2ppm RMS noise. They use

delta-sigma technology and provide single cycle digital

filter settling time (no latency delay) for multiplexed

applications. The first conversion after the channel is

changed is always valid. Through a single pin the LTC2424/

LTC2428 can be configured for better than 110dB rejec-

tion at 50Hz or 60Hz ±2%, or can be driven by an external

oscillator for a user defined rejection frequency in the

range 1Hz to 800Hz. The internal oscillator requires no

external frequency setting components.

The converters accept any external reference voltage from

0.1V to V

. With their extended input conversion range of

–12.5% V

REF

to 112.5% V

REF

= FS

SET

– ZS

SET

) the

LTC2424/LTC2428

smoothly resolve the offset and

overrange problems of preceding sensors or signal con-

ditioning circuits.

The

LTC2424/LTC2428

communicate through a flexible

4-wire digital interface which is compatible with SPI and

MICROWIRE

protocols.

■

Pin Compatible 4-/8-Channel 20-Bit ADCs

■

8ppm INL, No Missing Codes at 20 Bits

■

4ppm Full-Scale Error and 0.5ppm Offset

■

1.2ppm Noise

■

Digital Filter Settles in a Single Cycle. Each

Conversion is Accurate, Even After Changing

Channels

■

Fast Mode: 16-Bit Noise, 12-Bit TUE at 100sps

■

Internal Oscillator—No External Components

Required

■

110dB Min, 50Hz/60Hz Notch Filter

■

Reference Input Voltage: 0.1V to V

■

Live Zero—Extended Input Range Accommodates

12.5% Overrange and Underrange

■

Single Supply 2.7V to 5.5V Operation

■

Low Supply Current (200µA) and Auto Shutdown

■

Can Be Interchanged with 24-Bit LTC2404/LTC2408

if ZS

SET

Pin is Grounded

Total Unadjusted Error (3V Supply)

, LTC and LT are registered trademarks of Linear Technology Corporation.

No Latency ∆Σ is a trademark of Linear Technology Corporation.

MICROWIRE is a trademark of National Semiconductor Corporation.

■

Weight Scales

■

Direct Temperature Measurement

■

Gas Analyzers

■

Strain-Gage Transducers

■

Instrumentation

■

Data Acquisition

■

Industrial Process Control

■

4-Digit DVMs

ANALOG

INPUTS

–0.12V

REF

1.12V

REF

24248 TA01

CH0

CH1

CH2

CH3

CH4*

CH5*

CH6*

CH7*

–

4-/8-CHANNEL

MUX

5ZS

SET

*THESE PINS ARE NO CONNECTS ON THE LTC2404

GND

1, 6, 16, 18, 22, 27, 28

MPU

SERIAL DATA LINK

MICROWIRE AND

SPI COMPATABLE

CSADC

CSMUX

SCK

CLK

SDO

20-BIT

∆Σ ADC

LTC2424/LTC2428

0.1V TO V

ADCINMUXOUT

7 4 3 2, 8

1µF

2.7V TO 5.5V

SET

= INTERNAL OSC/50Hz REJECTION

= EXTERNAL CLOCK SOURCE

= INTERNAL OSC/60Hz REJECTION

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

INPUT VOLTAGE (V)

ERROR (ppm)

2.0

24248 G01

–2

–6

–4

–8

–10

0.5

1.0

1.5

2.5

= 3V

REF

= 2.5V

= –55°C, –45°C, 25°C, 90°C

Summary of content (36 pages)

PAGE 1
LTC2424/LTC2428 4-/8-Channel 20-Bit µPower No Latency ∆ΣTM ADCs U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC®2424/LTC2428 are 4-/8-channel 2.7V to 5.5V micropower 20-bit A/D converters with an integrated oscillator, 8ppm INL and 1.2ppm RMS noise. They use delta-sigma technology and provide single cycle digital filter settling time (no latency delay) for multiplexed applications. The first conversion after the channel is changed is always valid.
PAGE 2
LTC2424/LTC2428 W W U W ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Supply Voltage (VCC) to GND .......................– 0.3V to 7V Analog Input Voltage to GND ....... – 0.3V to (VCC + 0.3V) Reference Input Voltage to GND .. – 0.3V to (VCC + 0.3V) Digital Input Voltage to GND ........ – 0.3V to (VCC + 0.3V) Digital Output Voltage to GND ..... – 0.3V to (VCC + 0.3V) Operating Temperature Range LTC2424C/LTC2428C .............................. 0°C to 70°C LTC2424I/LTC2428I ...........................
PAGE 3
LTC2424/LTC2428 U CONVERTER CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 3, 4) PARAMETER CONDITIONS Total Unadjusted Error VREF = 2.5V VREF = 5V MIN TYP MAX UNITS Output Noise VIN = 0V, VREF = 5V (Note 13) 6 µVRMS Output Noise (Fast Mode) VREF = 5V, 100 Samples/Second, fO = 2.
PAGE 4
LTC2424/LTC2428 U U DIGITAL I PUTS A D DIGITAL OUTPUTS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS VIH High Level Input Voltage CS, FO 2.7V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 3.3V ● VIL Low Level Input Voltage CS, FO 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V ● VIH High Level Input Voltage SCK 2.7V ≤ VCC ≤ 5.5V (Note 9) 2.7V ≤ VCC ≤ 3.3V (Note 9) ● VIL Low Level Input Voltage SCK 4.
PAGE 5
LTC2424/LTC2428 WU TI I G CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
PAGE 6
LTC2424/LTC2428 U W TYPICAL PERFOR A CE CHARACTERISTICS Total Unadjusted Error (3V Supply) 10 10 VCC = 3V VREF = 2.5V 8 6 4 4 4 0 –2 –4 ERROR (ppm) 6 2 2 0 –2 TA = –55°C, –45°C, 25°C, 90°C TA = –55°C, –45°C, 25°C, 90°C –6 –8 –10 2.5 0.5 0 1.5 2.0 1.0 INPUT VOLTAGE (V) 6 4 –2 2.60 2.65 2.70 INPUT VOLTAGE (V) 2.75 2.80 –8 –10 1 0 3 2 INPUT VOLTAGE (V) 4 6 4 TA = 25°C TA = 90°C TA = –45°C 8 0 –2 VCC = 5V VREF = 5V 0 –2 –6 –6 –8 –0.05 –0.10 –0.15 –0.20 –0.25 –0.
PAGE 7
LTC2424/LTC2428 U W TYPICAL PERFOR A CE CHARACTERISTICS RMS Noise vs Reference Voltage 60 Offset Error vs VCC 10 VCC = 5V TA = 25°C VREF = 2.5V TA = 25°C 30 20 5 VREF = 2.5V TA = 25°C 7.5 RMS NOISE (ppm) OFFSET ERROR (ppm) RMS NOISE (ppm OF VREF) 50 40 RMS Noise vs VCC 10.0 0 –5 5.0 2.5 10 0 0 1 –10 5 2 3 4 REFERENCE VOLTAGE (V) 0 2.7 3.2 3.7 4.2 VCC (V) 5.2 5.5 4.7 24248 G10 Noise Histogram 3.75 RMS NOISE (ppm) 150 100 4.2 VCC (V) 4.7 5.2 5.
PAGE 8
LTC2424/LTC2428 U W TYPICAL PERFOR A CE CHARACTERISTICS Conversion Current vs Temperature Sleep Current vs Temperature 220 VCC = 4.1V VIN = 0V T = 25°C –40 F A = 0 O VCC = 5.5V 200 VCC = 4.1V 190 180 VCC = 2.7V 170 VCC = 2.
PAGE 9
LTC2424/LTC2428 U W TYPICAL PERFOR A CE CHARACTERISTICS VCC = 5V VREF = 5V FO = EXTERNAL 16 TA = –45°C TA = 25°C 14 TA = 90°C VCC = 5V VREF = 5V fO = EXTERNAL TA = 25°C TA = 90°C TA = –45°C 22 16 TA = –45°C 14 TA = 25°C TA = 90°C 20 18 12 12 10 24 VCC = 3V VREF = 2.
PAGE 10
LTC2424/LTC2428 U U U PIN FUNCTIONS CSADC (Pin 23): ADC Chip Select Input. A low on this pin enables the SDO digital output and following each conversion, the ADC automatically enters the Sleep mode and remains in a low power state as long as CSADC is high. If CSADC is low during the sleep state, the device draws normal power. A high on this pin also disables the SDO digital output. A low-to-high transition on CSADC during the Data Output state aborts the data transfer and starts a new conversion.
PAGE 11
LTC2424/LTC2428 U U W U APPLICATIONS INFORMATION Converter Operation Cycle The LTC2424/LTC2428 are low power, 4-/8-channel deltasigma analog-to-digital converters with easy-to-use 4-wire interfaces. Their operation is simple and made up of four states. The converter operation begins with the conversion, followed by a sleep state and concluded with the data output (see Figure 1). Channel selection may be performed while the device is in the sleep state or at the conclusion of the data output state.
PAGE 12
LTC2424/LTC2428 U W U U APPLICATIONS INFORMATION Ease of Use The LTC2424/LTC2428 data output has no latency, filter settling or redundant data associated with the conversion cycle. There is a one-to-one correspondence between the conversion and the output data. Therefore, multiplexing an analog input voltage is easy. The LTC2424/LTC2428 perform offset and full-scale calibrations every conversion cycle.
PAGE 13
LTC2424/LTC2428 U W U U APPLICATIONS INFORMATION The LTC2424/LTC2428 can be interchanged with the LTC2404/LTC2408. The two devices are designed to allow the user to incorporate either device in the same design as long as ZSSET (Pin 5) of the LTC2424/LTC2428 is tied to ground. While the LTC2424/LTC2428 output word lengths are 24 bits (as opposed to the 32-bit output of the LTC2404/ LTC2408), their output clock timing can be identical to the LTC2404/LTC2408.
PAGE 14
LTC2424/LTC2428 U U W U APPLICATIONS INFORMATION tCONV CSMUX/CSADC SDO Hi-Z EOC “0” SIG EXT MSB Hi-Z LSB BIT 23 BIT 22 BIT 0 SCK/CLK DIN EN D2 D1 DON’T CARE D0 24248 F04 Figure 4. Typical Data Input/Output Timing Table 2. LTC2424/LTC2428 Output Data Format Bit 23 EOC Bit 22 DMY Bit 21 SIG Bit 20 EXR Bit 19 MSB Bit 18 Bit 17 Bit 16 Bit 15 … Bit 0 LSB VIN > 9/8 • VREF 0 0 1 1 0 0 0 1 1 ... 1 9/8 • VREF 0 0 1 1 0 0 0 1 1 ...
PAGE 15
LTC2424/LTC2428 U U W U APPLICATIONS INFORMATION While the multiplexer is being programmed, the ADC is in the sleep state. Once the MUX addressing is complete, the data from the preceding conversion can be read. A new conversion cycle is initiated following the data read cycle with the analog input tied to the newly selected channel. Table 3.
PAGE 16
LTC2424/LTC2428 U U W U APPLICATIONS INFORMATION Table 4 summarizes the duration of each state as a function of FO. Operation at Higher Data Output Rates The LTC2424/LTC2428 typically operate with an internal oscillator of 153.6kHz. This corresponds to a notch frequency of 60Hz and an output rate of 7.5 samples/second. The internal oscillator is enabled if the FO pin is logic LOW (logic HIGH for a 50Hz notch). It is possible to drive the FO pin with an external oscillator for higher data output rates.
PAGE 17
LTC2424/LTC2428 U W U U APPLICATIONS INFORMATION At 100 samples/second, the LTC2424/LTC2428 can be used to capture transient data. This is useful for monitoring settling or auto gain ranging in a system. The LTC2424/ LTC2428 can monitor signals at an output rate of 100 samples/second. After acquiring 100 samples/second data, the FO pin may be driven LOW enabling 60Hz rejection to 110dB and the highest possible DC accuracy.
PAGE 18
LTC2424/LTC2428 U W U U APPLICATIONS INFORMATION 0 2Hz 100sps 0V OFFSET fIN = 2Hz 500ms 0.15 –20 0.10 MAGNITUDE (dB) ADC OUTPUT (NORMALIZED TO VOLTS) 0.20 0.05 0 –0.05 –40 –60 –80 –0.10 –100 –0.15 –120 –0.20 0 0.5 1 1.5 TIME (SEC) 2 2.5 0 24248 F11a Figure 11a. Digitized Waveform 25 FREQUENCY (Hz) 50 24248 F11b Figure 11b. Output FFT Figure 11. Transient Signal Acquisition 0 VIN = 300mVP-P + 2V DC 2.15 –20 2.05 2.00 1.95 –40 –60 –80 1.90 –100 1.85 1.80 –120 0 0.5 1 1.
PAGE 19
LTC2424/LTC2428 U W U U APPLICATIONS INFORMATION In the Internal SCK mode of operation, the SCK pin is an output and the LTC2424/LTC2428 creates its own serial clock by dividing the internal conversion clock by 8. In the External SCK mode of operation, the SCK pin is used as input. The internal or external SCK mode is selected on power-up and then reselected every time a HIGH-to-LOW transition is detected at the CSADC pin.
PAGE 20
LTC2424/LTC2428 U U W U APPLICATIONS INFORMATION While the device is in the sleep state, prior to entering the data output state, the user may program the multiplexer. As shown in Figure 13, the multiplexer channel is selected by serial shifting a 4-bit word into the DIN pin on the rising edge of CLK (CLK is tied to SCK). The first bit is an enable bit that must be HIGH in order to program a channel. The next three bits determine which channel is selected, see Table 3.
PAGE 21
LTC2424/LTC2428 U W U U APPLICATIONS INFORMATION the 24th rising edge of SCK. On the 24th falling edge of SCK, the device begins a new conversion. SDO goes HIGH (EOC = 1) indicating a conversion is in progress. clock input (SCK), or program the multiplexer in the first 1ms following the data output cycle. The remaining 65ms may be used to allow the input signal to settle. At the conclusion of the data cycle, CSADC may remain LOW and EOC monitored as an end-of-conversion interrupt.
PAGE 22
LTC2424/LTC2428 U U W U APPLICATIONS INFORMATION 2.7V TO 5.5V VCC VCC = 50Hz REJECTION = EXTERNAL OSCILLATOR = 60Hz REJECTION FO LTC2424/LTC2428 0.1V TO VCC –0.12VREF TO 1.12VREF FSSET CSMUX CH0 TO CH7 CSADC CS SCK SCK MUXOUT CLK ADCIN DIN ZSSET SDO GND CSADC/ CSMUX SCK/CLK TEST EOC BIT23 TEST EOC BIT22 BIT21 BIT20 BIT19 BIT18 SDO SIG Hi-Z DIN BIT9 BIT8 EXR MSB Hi-Z DON’T CARE EN D2 D1 D0 DON’T CARE 24248 F15 Figure 15.
PAGE 23
LTC2424/LTC2428 U W U U APPLICATIONS INFORMATION In order to select the internal serial clock timing mode, the serial clock pin (SCK) must be floating (Hi-Z) or pulled HIGH prior to the falling edge of CSADC. The device will not enter the internal serial clock mode if SCK is driven LOW on the falling edge of CSADC.
PAGE 24
LTC2424/LTC2428 U U W U APPLICATIONS INFORMATION 2.7V TO 5.5V VCC = 50Hz REJECTION = EXTERNAL OSCILLATOR = 60Hz REJECTION FO VCC LTC2424/LTC2428 0.1V TO VCC –0.12VREF TO 1.12VREF FSSET CSMUX CH0 TO CH7 CSADC SCK MUXOUT CS 10k CLK ADCIN DIN ZSSET SDO GND CSMUX tEOCtest CSADC SCKCLK TEST EOC BIT23 BIT22 BIT21 BIT20 BIT19 BIT18 TEST EOC SDO Hi-Z DIN BIT12 BIT11 BIT10 BIT9 BIT8 TEST EOC SIG EXR MSB Hi-Z DON’T CARE Hi-Z EN D2 D1 D0 DON’T CARE 24248 F17 Figure 17.
PAGE 25
LTC2424/LTC2428 U U W U APPLICATIONS INFORMATION While a digital input signal is in the 0.5V to (VCC␣ –␣ 0.5V) range, the CMOS input receiver draws additional current from the power supply. It should be noted that, when any one of the digital input signals (FO, CSADC, CSMUX, DIN, CLK and SCK in External SCK mode of operation) is within this range, the LTC2424/LTC2428 power supply current may increase even if the signal in question is at a valid logic level.
PAGE 26
LTC2424/LTC2428 U W U U APPLICATIONS INFORMATION If complete settling occurs on the input, conversion results will be unaffected by the dynamic input current. If the settling is incomplete, it does not degrade the linearity performance of the device. It simply results in an offset/ full-scale shift, see Figure 19. To simplify the analysis of input dynamic current, two separate cases are assumed: large capacitance at VIN (CIN > 0.01µF) and small capacitance at VIN (CIN < 0.01µF).
PAGE 27
LTC2424/LTC2428 U W U U APPLICATIONS INFORMATION 60 35 CIN = 22µF CIN = 10µF CIN = 1µF CIN = 0.1µF CIN = 0.01µF CIN = 0.001µF 25 FULL-SCALE ERROR (ppm) OFFSET ERROR (ppm) 30 CVREF = 22µF CVREF = 10µF CVREF = 1µF CVREF = 0.1µF CVREF = 0.01µF CVREF = 0.001µF 50 20 VCC = 5V VREF = 5V 15 VIN = 0V TA = 25°C 10 40 30 VCC = 5V VREF = 5V 20 VIN = 5V TA = 25°C 10 0 5 –10 0 0 200 400 600 RSOURCE (Ω) 0 1000 800 200 400 600 800 RESISTANCE AT VREF (Ω) 24248 F25 24248 F23 Figure 23.
PAGE 28
LTC2424/LTC2428 U W U U APPLICATIONS INFORMATION 50 256 • FO, where FO is the notch frequency (typically 50Hz or 60Hz). The bandwidth of signals not rejected by the digital filter is narrow (≈ 0.2%) compared to the bandwidth of the frequencies rejected. INL ERROR (ppm) VCC = 5V = 5V V 40 T REF A = 25°C 30 CVREF = 1000pF 20 CVREF = 100pF 10 CVREF = 0.01µF 0 –10 CVREF = 0pF –20 1 10 100 1k 10k RESISTANCE AT VREF (Ω) 100k 24248 F27 Figure 27.
PAGE 29
LTC2424/LTC2428 U U W U APPLICATIONS INFORMATION 1k 5V IN OUT 0.1µF LT1461-2.5 CER + 10µF 16V TANT TO LTC2424/LTC2428 FSSET GND 24248 F30 Figure 30. Low Power Reference than 60% full scale, and only marginally increases noise approaching full scale. Even lower power references can be used if only the lower end of the LTC2424/LTC2428 input range is required. 2.
PAGE 30
LTC2424/LTC2428 U U W U APPLICATIONS INFORMATION The LTC2428’s Resolution and Accuracy Allows You to Measure Points in a Ladder of Sensors The resistance of any of the RTDs (PT1 to PT7) is determined from the voltage across it, as compared to the voltage drop across the reference resistor (R1). This is a ratiometric implementation where the voltage drop across R1 is given by VREF – VCH1. Channel 7 is used to measure the voltage on a representative length of wire.
PAGE 31
LTC2424/LTC2428 U U W U APPLICATIONS INFORMATION Adding gain requires that one of the resistors (PT1 to PT7) be a precision resistor in order to eliminate the error associated with the gain setting resistors R2 and R3. Note, that if a precision (100Ω to 400Ω) resistor is used in place of one of the RTDs (PT7 recommended), R1 does not need to be a high precision resistor.
PAGE 32
LTC2424/LTC2428 U U W U APPLICATIONS INFORMATION channel resistance of the multiplexer does not contribute much to the error budget, as only input op amp current flows through the switch. The LTC1050 was chosen for its low input current and offset voltage, as well as its ability to drive the input of a ∆Σ ADC. Insert Gain or Buffering After the Multiplexer Separate MUXOUT and ADCIN terminals permit insertion of a gain stage between the MUX and the ADC.
PAGE 33
LTC2424/LTC2428 U W U U APPLICATIONS INFORMATION An 8-Channel DC-to-Daylight Digitizer The circuit in Figure 36 shows an example of the LTC2428’s flexibility in digitizing a number of real-world physical phenomena—from DC voltages to ultraviolet light. All of the examples implement single-ended signal conditioning.
PAGE 34
LTC2424/LTC2428 U W U U APPLICATIONS INFORMATION could be used to measure the case temperature of the RTD-based thermal power measurement scheme described previously. In general, thermistors yield very good resolution over a limited temperature range. For the half-bridge arrangement shown, the LTC2428 can measure temperature changes over nearly 5 orders of magnitude.
PAGE 35
LTC2424/LTC2428 U PACKAGE DESCRIPTIO Dimensions in millimeters (inches) unless otherwise noted. G Package 28-Lead Plastic SSOP (0.209) (LTC DWG # 05-08-1640) 10.07 – 10.33* (0.397 – 0.407) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 7.65 – 7.90 (0.301 – 0.311) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 5.20 – 5.38** (0.205 – 0.212) 1.73 – 1.99 (0.068 – 0.078) 0° – 8° 0.13 – 0.22 (0.005 – 0.009) 0.55 – 0.95 (0.022 – 0.037) NOTE: DIMENSIONS ARE IN MILLIMETERS *DIMENSIONS DO NOT INCLUDE MOLD FLASH.
PAGE 36
LTC2424/LTC2428 U TYPICAL APPLICATION GUARD RING 5V ELECTROMETER INPUT (pH, PIEZO) 3 7 + LT1793 2 R5 5k, 1% 6 DC VOLTMETER INPUT 1mV TO 1000V R1 900k 0.1%, 1W, 1000 WVDC R2 4.7k 0.1% – 0V TO 5V 4 –5V 5V REF + R4 1k –60mV TO 4V R3, 10k C1, 0.1µF 5V MAX LT1236CS8-5 6 2 OUT IN + GND 4 10µF 3-WIRE R-PACK 60Hz + AC INPUT R6 10k, 0.1% 100µF R7 10k, 0.1% 5V 5V 1µF 2 RT 7 – IN914 3 R9 1k 1% IN914 R10 5k 1% 6 LTC1050 R8 100Ω, 5% + 4 20mV TO 80mV –5V R11 24.9k, 0.