Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsData collecting ICsData acquisition IC - AD converter (ADC) External SOIC 8

LTC2420

20-Bit µPower

No Latency ∆Σ

ADC in SO-8

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Weight Scales

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Direct Temperature Measurement

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Gas Analyzers

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Strain Gauge Transducers

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Instrumentation

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Data Acquisition

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Industrial Process Control

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4-Digit DVMs

No Latency ∆Σ is a trademark of Linear Technology Corporation.

MICROWIRE is a trademark of National Semiconductor Corporation.

Total Unadjusted Error (3V Supply)

, LTC and LT are registered trademarks of Linear Technology Corporation.

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20-Bit ADC in SO-8 Package

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8ppm INL, No Missing Codes at 20 Bits

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4ppm Full-Scale Error

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0.5ppm Offset

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1.2ppm Noise

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Digital Filter Settles in a Single Cycle. Each

Conversion Is Accurate, Even After an Input Step

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Fast Mode: 16-Bit Noise, 12 Bits TUE at 100sps

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Internal Oscillator—No External Components

Required

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110dB Min, 50Hz/60Hz Notch Filter

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Reference Input Voltage: 0.1V to V

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Live Zero—Extended Input Range Accommodates

12.5% Overrange and Underrange

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Single Supply 2.7V to 5.5V Operation

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Low Supply Current (200µA) and Auto Shutdown

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Pin Compatible with 24-Bit LTC2400

The LTC

2420 is a micropower 20-bit A/D converter with

an integrated oscillator, 8ppm INL and 1.2ppm RMS

noise that operates from 2.7V to 5.5V. It uses delta-sigma

technology and provides a digital filter that settles in a

single cycle for multiplexed applications. Through a single

pin, the LTC2420 can be configured for better than 110dB

rejection at 50Hz or 60Hz ±2%, or it can be driven by an

external oscillator for a user-defined rejection frequency

in the range 1Hz to 800Hz. The internal oscillator requires

no external frequency setting components.

The converter accepts any external reference voltage from

0.1V to V

. With its extended input conversion range of

–12.5% V

REF

to 112.5% V

REF

, the LTC2420 smoothly

resolves the offset and overrange problems of preceding

sensors or signal conditioning circuits.

The LTC2420 communicates through a flexible 3-wire

digital interface which is compatible with SPI and

MICROWIRE

protocols.

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

REF

SCK

SDO

GND CS

REFERENCE

VOLTAGE

0.1V TO V

ANALOG

INPUT RANGE

–0.12V

REF

TO 1.12V

REF

= INTERNAL OSC/50Hz REJECTION

= EXTERNAL CLOCK SOURCE

= INTERNAL OSC/60Hz REJECTION

3-WIRE

SPI INTERFACE

1µF

2.7V TO 5.5V

LTC2420

2420 TA01

INPUT VOLTAGE (V)

ERROR (ppm)

2.0

2420 G01

–2

–6

–4

–8

–10

0.5

1.0

1.5

2.5

= 3V

REF

= 2.5V

= –55°C, –45°C, 25°C, 90°C

Summary of content (36 pages)

PAGE 1
LTC2420 20-Bit µPower No Latency ∆Σ ADC in SO-8 TM U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO 20-Bit ADC in SO-8 Package 8ppm INL, No Missing Codes at 20 Bits 4ppm Full-Scale Error 0.5ppm Offset 1.2ppm Noise Digital Filter Settles in a Single Cycle. Each Conversion Is Accurate, Even After an Input Step Fast Mode: 16-Bit Noise, 12 Bits TUE at 100sps Internal Oscillator—No External Components Required 110dB Min, 50Hz/60Hz Notch Filter Reference Input Voltage: 0.
PAGE 2
LTC2420 U W W W ABSOLUTE MAXIMUM RATINGS U W U PACKAGE/ORDER INFORMATION (Notes 1, 2) Supply Voltage (VCC) to GND .......................– 0.3V to 7V Analog Input Voltage to GND ....... – 0.3V to (VCC + 0.3V) Reference Input Voltage to GND .. – 0.3V to (VCC + 0.3V) Digital Input Voltage to GND ........ – 0.3V to (VCC + 0.3V) Digital Output Voltage to GND ..... – 0.3V to (VCC + 0.3V) Operating Temperature Range LTC2420C ............................................... 0°C to 70°C LTC2420I .............
PAGE 3
LTC2420 U U U U A ALOG I PUT A D REFERE CE The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN VIN Input Voltage Range (Note 14) VREF Reference Voltage Range CS(IN) Input Sampling Capacitance CS(REF) Reference Sampling Capacitance IIN(LEAK) Input Leakage Current CS = VCC ● – 100 1 100 nA IREF(LEAK) Reference Leakage Current VREF = 2.
PAGE 4
LTC2420 WU TI I G CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN fEOSC External Oscillator Frequency Range 20-Bit Effective Resolution 12-Bit Effective Resolution tHEO TYP MAX UNITS kHz MHz ● ● 2.56 2.56 307.2 2.048 External Oscillator High Period ● 0.2 390 µs tLEO External Oscillator Low Period ● 0.
PAGE 5
LTC2420 U W TYPICAL PERFOR A CE CHARACTERISTICS Total Unadjusted Error (3V Supply) 10 10 VCC = 3V VREF = 2.5V 8 6 4 4 4 2 –2 –4 ERROR (ppm) 6 0 2 0 –2 TA = –55°C, –45°C, 25°C, 90°C –6 –8 –10 2.5 0.5 0 1.5 2.0 1.0 INPUT VOLTAGE (V) 6 4 4 –2 –4 2 0 –2 –4 TA = –55°C, –45°C, 25°C, 90°C –6 ERROR (ppm) 6 4 0 –8 2.60 2.65 2.70 INPUT VOLTAGE (V) 2.75 –10 2.
PAGE 6
LTC2420 U W TYPICAL PERFOR A CE CHARACTERISTICS RMS Noise vs Reference Voltage 60 VCC = 5V TA = 25°C 30 20 VREF = 2.5V TA = 25°C 7.5 5 RMS NOISE (ppm) OFFSET ERROR (ppm) 40 10.0 VREF = 2.5V TA = 25°C 50 RMS NOISE (ppm OF VREF) RMS Noise vs VCC Offset Error vs VCC 10 0 5.0 2.5 –5 10 0 –10 0 0 1 2.7 5 2 3 4 REFERENCE VOLTAGE (V) 3.2 3.7 4.2 VCC (V) 2420 G10 Noise Histogram VCC = 5V VREF = 5V VIN = 0.3V TO 5.3V TA = 25°C 3.75 RMS NOISE (ppm) 150 100 4.2 VCC (V) 4.7 5.2 5.
PAGE 7
LTC2420 U W TYPICAL PERFOR A CE CHARACTERISTICS Conversion Current vs Temperature 230 220 –20 VCC = 4.1V VIN = 0V T = 25°C –40 F A = 0 O VCC = 5.5V 200 VCC = 4.1V 190 180 VCC = 2.7V 170 VCC = 2.
PAGE 8
LTC2420 U W TYPICAL PERFOR A CE CHARACTERISTICS VCC = 5V VREF = 5V FO = EXTERNAL 16 TA = –45°C TA = 25°C 14 TA = 90°C VCC = 5V VREF = 5V fO = EXTERNAL TA = 25°C TA = 90°C TA = –45°C 22 16 TA = –45°C 14 TA = 25°C TA = 90°C 20 18 12 12 10 Resolution vs Output Rate 24 VCC = 3V VREF = 2.
PAGE 9
LTC2420 W FU CTIO AL BLOCK DIAGRA U U INTERNAL OSCILLATOR VCC GND VIN AUTOCALIBRATION AND CONTROL ∫ ∫ FO (INT/EXT) ∫ ∑ SDO SERIAL INTERFACE ADC SCK CS VREF DECIMATING FIR DAC 2420 FD TEST CIRCUITS VCC 3.4k SDO SDO 3.
PAGE 10
LTC2420 U W U U APPLICATIO S I FOR ATIO The LTC2420 is pin compatible with the LTC2400. The two devices are designed to allow the user to incorporate either device in the same design with no modifications. While the LTC2420 output word length is 24 bits (as opposed to the 32-bit output of the LTC2400), its output clock timing can be identical to the LTC2400. As shown in Figure 1, the LTC2420 data output is concluded on the falling edge of the 24th serial clock (SCK).
PAGE 11
LTC2420 U W U U APPLICATIO S I FOR ATIO not disturb the cyclic operation described above. These modes of operation are described in detail in the Serial Interface Timing Modes section. Conversion Clock A major advantage delta-sigma converters offer over conventional type converters is an on-chip digital filter (commonly known as Sinc or Comb filter). For high resolution, low frequency applications, this filter is typically designed to reject line frequencies of 50Hz or 60Hz plus their harmonics.
PAGE 12
LTC2420 U U W U APPLICATIO S I FOR ATIO fault current, a resistor of up to 25k may be added in series with the VIN pin without affecting the performance of the device. In the physical layout, it is important to maintain the parasitic capacitance of the connection between this series resistance and the VIN pin as low as possible; therefore, the resistor should be located as close as practical to the VIN pin.
PAGE 13
LTC2420 U U W U APPLICATIO S I FOR ATIO the rising edge of the 24th SCK pulse. On the falling edge of the 24th SCK pulse, SDO goes HIGH indicating a new conversion cycle has been initiated. This bit serves as EOC (Bit 23) for the next conversion cycle. Table 2 summarizes the output data format. change during the sleep or data output states will not disturb the converter operation.
PAGE 14
LTC2420 U W U U APPLICATIO S I FOR ATIO –60 Table 3 summarizes the duration of each state as a function of FO. –70 REJECTION (dB) –80 SERIAL INTERFACE –90 –100 –110 –120 –130 –140 –12 –8 –4 0 4 8 12 INPUT FREQUENCY DEVIATION FROM NOTCH FREQUENCY (%) 2420 F05 Figure 5.
PAGE 15
LTC2420 U W U U APPLICATIO S I FOR ATIO Serial Data Output (SDO) SERIAL INTERFACE TIMING MODES The serial data output pin, SDO (Pin 6), drives the serial data during the data output state. In addition, the SDO pin is used as an end of conversion indicator during the conversion and sleep states. The LTC2420’s 3-wire interface is SPI and MICROWIRE compatible. This interface offers several flexible modes of operation.
PAGE 16
LTC2420 U W U U APPLICATIO S I FOR ATIO 2.7V TO 5.5V VCC 1µF VCC = 50Hz REJECTION = EXTERNAL OSCILLATOR = 60Hz REJECTION FO LTC2420 VREF 0.1V TO VCC VIN –0.12VREF TO 1.12VREF VREF SCK VIN SDO GND CS CS TEST EOC TEST EOC SDO BIT 23 EOC Hi-Z BIT 22 BIT 21 BIT 20 BIT 19 SIG EXR MSB BIT 18 BIT 4 Hi-Z BIT 0 TEST EOC LSB20 Hi-Z SCK (EXTERNAL) CONVERSION SLEEP DATA OUTPUT CONVERSION 2420 F06 Figure 6.
PAGE 17
LTC2420 U U W U APPLICATIO S I FOR ATIO 2.7V TO 5.5V VCC 1µF VCC = 50Hz REJECTION = EXTERNAL OSCILLATOR = 60Hz REJECTION FO LTC2420 VREF 0.1V TO VCC VIN –0.12VREF TO 1.12VREF VREF SCK VIN SDO GND CS BIT 22 BIT 21 BIT 20 BIT 19 SIG EXR MSB CS TEST EOC BIT 0 SDO TEST EOC BIT 23 EOC EOC Hi-Z Hi-Z BIT 9 TEST EOC BIT 8 Hi-Z Hi-Z SCK (EXTERNAL) SLEEP CONVERSION SLEEP DATA OUTPUT CONVERSION 2420 F07 DATA OUTPUT Figure 7. External Serial Clock, Reduced Data Output Length 2.
PAGE 18
LTC2420 U U W U APPLICATIO S I FOR ATIO to the SDO pin. EOC = 1 while a conversion is in progress and EOC = 0 if the device is in the sleep state. into an internal static shift register. The device remains in the sleep state until the first rising edge of SCK. Data is shifted out the SDO pin on each falling edge of SCK enabling external circuitry to latch data on the rising edge of SCK. EOC can be latched on the first rising edge of SCK.
PAGE 19
LTC2420 U U W U APPLICATIO S I FOR ATIO conversion result into external circuitry. EOC can be latched on the first rising edge of SCK and the last bit of the conversion result on the 24th rising edge of SCK. After the 24th rising edge, SDO goes HIGH (EOC = 1), SCK stays HIGH, and a new conversion starts. Typically, CS remains LOW during the data output state. However, the data output state may be aborted by pulling CS HIGH anytime between the first and 24th rising edge of SCK, see Figure 10.
PAGE 20
LTC2420 U U W U APPLICATIO S I FOR ATIO Internal Serial Clock, 2-Wire I/O, Continuous Conversion then immediately begins outputting data. The data output cycle begins on the first rising edge of SCK and ends after the 24th rising edge. Data is shifted out the SDO pin on each falling edge of SCK. The internally generated serial clock is output to the SCK pin. This signal may be used to shift the conversion result into external circuitry.
PAGE 21
LTC2420 U W U U APPLICATIO S I FOR ATIO capacitor tied to CS, see Figure 12. The time the converter spends in the sleep state is determined by the value of the external timing capacitor, see Figures 13 and 14. Once the voltage at CS falls below an internal threshold (≈1.4V), the device automatically begins outputting data. The data output cycle begins on the first rising edge of SCK and ends on the 24th rising edge. Data is shifted out the SDO pin on each falling edge of SCK.
PAGE 22
LTC2420 U W U U APPLICATIO S I FOR ATIO The digital output signals (SDO and SCK in Internal SCK mode of operation) are less of a concern because they are not generally active during the conversion state. 8 7 SAMPLE RATE (Hz) 6 VCC = 5V 5 VCC = 3V 4 3 2 1 0 0 10 100 10000 100000 1000 CAPACITANCE ON CS (pF) 2420 F14 Figure 14.
PAGE 23
LTC2420 U W U U APPLICATIO S I FOR ATIO propagation delay from the driver to LTC2420. For reference, on a regular FR-4 board, signal propagation velocity is approximately 183ps/inch for internal traces and 170ps/inch for surface traces. Thus, a driver generating a control signal with a minimum transition time of 1ns must be connected to the converter pin through a trace shorter than 2.5 inches.
PAGE 24
LTC2420 U W U U APPLICATIO S I FOR ATIO 50 30 CIN = 0pF CIN = 100pF CIN = 1000pF 20 CIN = 22µF CIN = 10µF CIN = 1µF CIN = 0.1µF CIN = 0.01µF CIN = 0.001µF 30 OFFSET ERROR (ppm) 40 OFFSET ERROR (ppm) 35 VCC = 5V VREF = 5V VIN = 0V TA = 25°C CIN = 0.01µF 25 20 VCC = 5V VREF = 5V 15 VIN = 0V TA = 25°C 10 10 5 0 0 1 10 1k 100 RSOURCE (Ω) 10k 100k 0 200 400 600 RSOURCE (Ω) 800 2420 F19 2420 F21 Figure 19. Offset vs RSOURCE (Small C) Figure 21.
PAGE 25
LTC2420 U U W U APPLICATIO S I FOR ATIO 60 VCC = 5V V = 5V 40 T REF A = 25°C 40 INL ERROR (ppm) 50 FULL-SCALE ERROR (ppm) 50 CVREF = 22µF CVREF = 10µF CVREF = 1µF CVREF = 0.1µF CVREF = 0.01µF CVREF = 0.001µF 30 VCC = 5V VREF = 5V 20 VIN = 5V TA = 25°C 30 CVREF = 1000pF 20 CVREF = 100pF 10 CVREF = 0.01µF 10 0 0 –10 CVREF = 0pF –20 –10 0 200 400 600 800 RESISTANCE AT VREF (Ω) 1 1000 10 100 1k 10k RESISTANCE AT VREF (Ω) 2420 F25 2420 F23 Figure 23.
PAGE 26
LTC2420 U W U U APPLICATIO S I FOR ATIO 0 800Hz NOTCH (100 SAMPLES/SECOND) –20 60Hz NOTCH (7.5 SAMPLES/SECOND) REJECTION (dB) –40 1 2 –60 3 –80 4 LTC2420 VCC FO VREF SCK VIN SDO CS GND 8 7 6 5 EXTERNAL 2.048MHz CLOCK SOURCE –100 INTERNAL 153.6kHz OSCILLATOR 2420 F28 –120 Figure 28. Selectable 100 Samples/Second Turbo Mode –140 0 fS/2 fS INPUT FREQUENCY 256 VREF = 5V Figure 27.
PAGE 27
LTC2420 U W U U APPLICATIO S I FOR ATIO 256 TOTAL UNADJUSTED ERROR (ppm) OUTPUT RATE = 100sps 12 BITS 224 192 160 13 BITS 128 96 14 BITS 64 15 BITS 32 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 REFERENCE VOLTAGE (V) 4.5 5.0 2420 F30 Figure 30. Total Error vs VREF (Output Rate = 100sps) TOTAL UNADJUSTED ERROR (ppm) VCC = 5V VREF = 2.5V 5 0 –5 –10 –15 –20 –25 –30 –35 TOTAL UNADJUSTED ERROR (ppm) 6 10 2 0 –2 –4 –6 –8 –10 –40 0 2.
PAGE 28
LTC2420 U W U U APPLICATIO S I FOR ATIO 0 fIN = 2Hz 500ms 0.15 2Hz 100sps 0V OFFSET –20 0.10 MAGNITUDE (dB) ADC OUTPUT (NORMALIZED TO VOLTS) 0.20 0.05 0 –0.05 –40 –60 –80 –0.10 –100 –0.15 –120 –0.20 FREQUENCY (Hz) TIME 2420 F33b 2420 F33a 33a. Digitized Waveform 33b. Output FFT Figure 33. Transient Signal Acquisiton 0 VIN = 300mVP-P + 2V DC 2.15 15Hz 100sps 2V OFFSET –20 2.10 MAGNITUDE (dB) ADC OUTPUT (NORMALIZED TO VOLTS) 2.20 2.05 2.00 1.95 –40 –60 –80 1.90 –100 1.85 1.
PAGE 29
LTC2420 U TYPICAL APPLICATIO S SYNCHRONIZATION OF MULTIPLE LTC2420s Increasing the Output Rate Using Multiple LTC2420s Since the LTC2420’s absolute accuracy (total unadjusted error) is 10ppm, applications utilizing multiple matched ADCs are possible. A second application uses multiple LTC2420s to increase the effective output rate by 4×, see Figure 36. In this case, four LTC2420s are interleaved under the control of separate CS signals. This increases the effective output rate from 7.
PAGE 30
LTC2420 U TYPICAL APPLICATIO S LTC2420 #1 VCC µCONTROLLER LTC2420 #2 FO VCC LTC2420 #3 FO VCC VREF (0.1V TO VCC) EXTERNAL OSCILLATOR (153,600HZ) LTC2420 #4 FO VCC FO VREF SCK VREF SCK VREF SCK VREF SCK VIN SDO VIN SDO VIN SDO VIN SDO GND CS GND CS GND CS GND CS SCK SDO CS1 CS2 CS3 CS4 CS1 CS2 CS3 CS4 SCK 23 OR LESS CLOCK PULSES SDO 2420 F36 Figure 36.
PAGE 31
LTC2420 U TYPICAL APPLICATIO S Single-Chip Instrumentation Amplifier for the LTC2420 reduces the magnitude of averaged noise by 30% and improves resolution by 0.5 bit without compromising linearity. Resistor R2 performs two functions: it isolates C1 from the LTC2420’s input and limits the LTC2420’s input current should its input voltage drop below –300mV or swing above VCC + 300mV.
PAGE 32
LTC2420 U TYPICAL APPLICATIO S Table 5. Typical Performance of the LTC2420 ADC When Used with the LT1920 Instrumentation Amplifiers in Figure 34’s Differential Digitizing Circuit VS = ±5V PARAMETER Differential Input Voltage Range Zero Error VS = ±15V AV = 10 AV = 100 AV = 10 AV = 100 TOTAL (UNITS) – 30 to 400 – 3 to 40 – 30 to 500 – 3 to 50 mV –160 – 2650 – 213 – 2625 Maximum Input Current 2.0 Nonlinearity ±8.2 ±7.4 Noise (Without Averaging) 1.8* 0.
PAGE 33
LTC2420 U TYPICAL APPLICATIO S Using a Low Power Precision Reference where the noise of the amplifier begins to dominate, the input referred noise is essentially that of the instrumentation amplifier. The linearity of the instrumentation amplifier does, however, degrade at higher gains.
PAGE 34
LTC2420 U TYPICAL APPLICATIO S relaxation oscillators using the 74HC14 or similar devices. The circuit can be tuned over a 3:1 range with only one resistor and can be gated. The use of transmission gates could be used to shift the frequency in order to provide setable conversion rates. 2.
PAGE 35
LTC2420 W PACKAGE I FOR ATIO Dimensions in inches (millimeters) unless otherwise noted. U U S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 8 7 6 5 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0.053 – 0.069 (1.346 – 1.752) 0°– 8° TYP 0.016 – 0.050 (0.406 – 1.270) 0.014 – 0.019 (0.355 – 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH.
PAGE 36
LTC2420 U TYPICAL APPLICATIO The circuit shown in Figure 41 enables pseudodifferential measurements of several bridge transducers and absolute temperature measurement. The LTC1391 is an 8-to-1 analog multiplexer. Consecutive readings are performed on each side of the bridge by selecting the appropriate channel on the LTC1391. Each output is digitized and the results digitally subtracted to obtain the pseudodifferential result. Several bridge transducers may be digitized in this manner.