Datasheet

LTC2415/LTC2415-1
10
sn2415 24151fs
GND (Pins 1, 7, 8, 9, 10, 15, 16): Ground. Multiple ground
pins internally connected for optimum ground current flow
and V
CC
decoupling. Connect each one of these pins to a
ground plane through a low impedance connection. All seven
pins must be connected to ground for proper operation.
V
CC
(Pin 2): Positive Supply Voltage. Bypass to GND
(Pin␣ 1) with a 10µF tantalum capacitor in parallel with
0.1µF ceramic capacitor as close to the part as possible.
REF
+
(Pin 3), REF
–
(Pin 4): Differential Reference Input.
The voltage on these pins can have any value between GND
and V
CC
as long as the reference positive input, REF
+
, is
maintained more positive than the reference negative
input, REF
–
, by at least 0.1V.
IN
+
(Pin 5), IN
–
(Pin 6): Differential Analog Input. The
voltage on these pins can have any value between
GND – 0.3V and V
CC
+ 0.3V. Within these limits the
converter bipolar input range (V
IN
= IN
+
– IN
–
) extends
from –0.5 • (V
REF
) to 0.5 • (V
REF
). Outside this input range
the converter produces unique overrange and underrange
output codes.
CS (Pin 11): Active LOW Digital Input. A LOW on this pin
enables the SDO digital output and wakes up the ADC.
Following each conversion, the ADC automatically enters
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW-to-HIGH transition on CS
during the Data Output transfer aborts the data transfer
and starts a new conversion.
SDO (Pin 12): Three-State Digital Output. During the Data
Output period, this pin is used as serial data output. When
the chip select CS is HIGH (CS = V
CC
) the SDO pin is in a
high impedance state. During the Conversion and Sleep
periods, this pin is used as the conversion status output.
The conversion status can be observed by pulling CS LOW.
SCK (Pin 13): Bidirectional Digital Clock Pin. In Internal
Serial Clock Operation mode, SCK is used as digital output
for the internal serial interface clock during the Data
Output period. In External Serial Clock Operation mode,
SCK is used as digital input for the external serial interface
clock during the Data Output period. A weak internal pull-
up is automatically activated in Internal Serial Clock Op-
eration mode. The Serial Clock Operation mode is deter-
mined by the logic level applied to the SCK pin at power up
or during the most recent falling edge of CS.
PI FU CTIO S
UUU
TYPICAL PERFOR A CE CHARACTERISTICS
UW
OUTPUT DATA RATE (READINGS/SEC)
010
20 30 40 50 60 70 80 90 100
SUPPLY CURRENT (µA)
2415 G37
1000
900
800
700
600
500
400
300
200
100
0
V
CC
= 5V
REF
+
= 5V
REF
–
= GND
IN
+
= GND
IN
–
= GND
F
O
= EXT OSC
CS = GND
SCK =N/C
SDO = N/C
TEMPERATURE (°C)
–45
–30 –15 0 15 30 45 60 75 90
SUPPLY CURRENT (µA)
2415 G38
25
24
23
22
21
20
19
18
17
16
15
V
REF
+
= V
CC
V
REF
–
= GND
V
IN
+
= V
IN
–
= GND
F
O
= GND
CS = V
CC
SCK = SDO = N/C
V
CC
= 5.5V
V
CC
= 4.1V
V
CC
= 2.7V
Conversion Current vs Output
Data Rate
Sleep Current vs
Temperature (T
A
)