Datasheet

LTC2413
11
sn2413 2413fs
TEST CIRCUITS
APPLICATIO S I FOR ATIO
WUU
U
FU CTIO AL BLOCK DIAGRA
UU
W
Figure 2. LTC2413 State Transition Diagram
CONVERTER OPERATION
Converter Operation Cycle
The LTC2413 is a low power, delta-sigma analog-to-
digital converter with an easy to use 3-wire serial interface.
Its operation is made up of three states. The converter
operating cycle begins with the conversion, followed by
the low power sleep state and ends with the data output
(see Figure 2). The 3-wire interface consists of serial data
output (SDO), serial clock (SCK) and chip select (CS).
Initially, the LTC2413 performs a conversion. Once the
conversion is complete, the device enters the sleep state.
While in this sleep state, power consumption is reduced by
an order of magnitude. The part remains in the sleep state
as long as CS is HIGH. The conversion result is held
indefinitely in a static shift register while the converter is
in the sleep state.
AUTOCALIBRATION
AND CONTROL
DAC
DECIMATING FIR
INTERNAL
OSCILLATOR
SERIAL
INTERFACE
ADC
∑
∫∫∫
GND
V
CC
IN
+
IN
–
SDO
SCK
REF
+
REF
–
CS
F
O
(INT/EXT)
2413 FD
–+
+
–
1.69k
SDO
2413 TA04
Hi-Z TO V
OL
V
OH
TO V
OL
V
OL
TO Hi-Z
C
LOAD
= 20pF
V
CC
1.69k
SDO
2413 TA03
Hi-Z TO V
OH
V
OL
TO V
OH
V
OH
TO Hi-Z
C
LOAD
= 20pF
CONVERT
SLEEP
DATA OUTPUT
2413 F02
TRUE
FALSE
CS = LOW
AND
SCK
Figure 1. Functional Block Diagram