Datasheet

23
LTC2404/LTC2408
APPLICATIONS INFORMATION
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power dissipation. A series resistor between 27Ω and 56Ω
placed near the driver or near the LTC2404/LTC2408 pin
will also eliminate this problem without additional power
dissipation. The actual resistor value depends upon the
trace impedance and connection topology.
Driving the Input and Reference
The analog input and reference of the typical delta-sigma
analog-to-digital converter are applied to a switched ca-
pacitor network. This network consists of capacitors switch-
ing between the analog input (ADCIN), ground and the
reference (V
REF
). The result is small current spikes seen at
both ADCIN and V
REF
. A simplified input equivalent circuit
is shown in Figure 12.
The key to understanding the effects of this dynamic input
current is based on a simple first order RC time constant
model. Using the internal oscillator, the internal switched
capacitor network of the LTC2404/LTC2408 is clocked at
153,600Hz corresponding to a 6.5µs sampling period.
Fourteen time constants are required each time a capacitor
is switched in order to achieve 1ppm settling accuracy.
Therefore, the equivalent time constant at V
IN
and V
REF
should be less than 6.5µs/14 = 460ns in order to achieve
1ppm accuracy.
Input Current (V
IN
)
If complete settling occurs on the input, conversion re-
sults will be uneffected by the dynamic input current. If the
settling is incomplete, it does not degrade the linearity
performance of the device. It simply results in an offset/
full-scale shift, see Figure 13. To simplify the analysis of
input dynamic current, two separate cases are assumed:
large capacitance at V
IN
(C
IN
> 0.01µF) and small capaci-
tance at V
IN
(C
IN
< 0.01µF).
If the total capacitance at V
IN
(see Figure 14) is small
(<0.01µF), relatively large external source resistances (up
to 20k for 20pF parasitic capacitance) can be tolerated
without any offset/full-scale error. Figures 15 and 16 show
a family of offset and full-scale error curves for various
Figure 12. LTC2404/LTC2408 Equivalent Analog Input Circuit
V
REF
CHX
ADCV
CC
(PIN 2)
R
SW
5k
AVERAGE INPUT CURRENT:
I
DC
= 0.25(V
IN
– 0.5 • V
REF
) • f • C
EQ
I
REF
I
REF
ADCV
CC
(PIN 2)
I
IN(LEAK)
I
IN(LEAK)
±I
DC
MUXV
CC
(PIN 8)
I
IN(MUX)
I
IN(MUX)
R
SW
5k
R
SW
75Ω
C
EQ
10pF (TYP)
R
SW
5k
SELECTED
CHANNEL
24048 F12
f
OUT
= 50Hz, INTERNAL OSCILLATOR: f = 128kHz
f
OUT
= 60Hz, INTERNAL OSCILLATOR: f = 153.6kHz
EXTERNAL OSCILLATOR: 2.56kHz ≤ f ≤ 307.2kHz
GND
ADCIN
MUXOUT
Figure 13. Offset/Full-Scale Shift
Figure 14. An RC Network at CH0 to CH7
C
IN
24048 F14
INTPUT
SIGNAL
SOURCE
R
SOURCE
CH0 TO
CH7
LTC2404/
LTC2408
C
PAR
≅20pF
0
TUE
V
REF
/2
V
IN
24048 F13
V
REF