Datasheet

31
LTC2404/LTC2408
APPLICATIONS INFORMATION
WUU
U
68HC11
2404/08 F29
MISO (PD2)
9
TO
17
GND
1, 5, 6, 16, 18, 22, 27, 28
23
20
25
19
21
24
CSADC
CSMUX
SCK
CLK
D
IN
SDO
26
F
O
LTC2408
CH0 TO
CH7
MUXOUT
7 4 3 2, 8
10µF
5V
V
REF
ADCIN V
CC
V
CC
24-BIT
∆Σ ADC
SCK (PD4)
SS (PD5)
MOSI (PD3)
LTC1391
S0
S1
S2
S3
S4
S5
S6
S7
CH8
CH9
CH10
CH11
CH12
CH13
CH14
CH15
1
2
3
4
5
6
7
8
D
CLK
CS
D
OUT
D
IN
15
10
11
13
12
Figure 29. Combining the LTC2408 with the LTC1391 for 16 Input Channels
Figure 28. LTC2408-68HC11 MCU Digital Interface Routine
*
***************************************
* The SPI data transfer *
***************************************
*
TRFLP1 LDAA #$0 Load accumulator A with a null byte for SPI transfer
STAA SPDR This writes the byte into the SPI data register and
* starts the transfer
WAIT1 LDAA SPSR This loop waits for the SPI to complete a serial
* transfer/exchange by reading the SPI Status Register
BPL WAIT1 The SPIF (SPI transfer complete flag) bit is the SPSR’s
* MSB and is set to one at the end of an SPI transfer. The
* branch will occur while SPIF is a zero.
LDAA SPDR Load accumulator A with the current byte of LTC2408 data
* that was just received
STAA 0,X Transfer the LTC2408’s data to memory
INX Increment the pointer
CPX #DIN4+1 Has the last byte been transferred/exchanged?
BNE TRFLP1 If the last byte has not been reached, then proceed to
* the next byte for transfer/exchage
BSET PORTD,Y %00100000 This sets the SS* output bit to a logic
* high, de-selecting the LTC2408
PULA Restore the A register
PULY Restore the Y register
PULX Restore the X register
RTS