Datasheet

16
LTC2404/LTC2408
The DC specifications are guaranteed for f
EOSC
up to a
maximum of 307.2kHz, resulting in a maximum output
word rate of approximately 15Hz. However, for faster rates
at reduced performance, frequencies up to 1.22MHz can
be used on the F
O
pin. Figures 5 and 6 show the INL and
Resolution vs Output Rate.
SERIAL INTERFACE
The LTC2404/LTC2408 transmit the conversion results,
program the channel selection, and receive the start of
conversion command through a synchronous 4-wire in-
terface (SCK = CLK, CSADC = CSMUX). During the conver-
sion and sleep states, this interface can be used to assess
the converter status. While in the sleep state this interface
may be used to program an input channel. During the data
output state it is used to read the conversion result.
ADC Serial Clock Input/Output (SCK)
The serial clock signal present on SCK (Pin 25) is used to
synchronize the data transfer. Each bit of data is shifted out
the SDO pin on the falling edge of the serial clock.
In the Internal SCK mode of operation, the SCK pin is an
output and the LTC2404/LTC2408 creates its own serial
clock by dividing the internal conversion clock by 8. In the
External SCK mode of operation, the SCK pin is used as
input. The internal or external SCK mode is selected on
power-up and then reselected every time a HIGH-to-LOW
transition is detected at the CSADC pin. If SCK is HIGH or
floating at power-up or during this transition, the converter
enters the internal SCK mode. If SCK is LOW at power-up
or during this transition, the converter enters the external
SCK mode.
Multiplexer Serial Input Clock (CLK)
Generally, this pin is externally tied to SCK for 4-wire op-
eration. On the rising edge of CLK (Pin 19) with CSMUX held
HIGH, data is serially shifted into the multiplexer. If CSMUX
is LOW the CLK input will be disabled and the channel
selection unchanged.
Serial Data Output (SDO)
The serial data output pin, SDO (Pin 24), drives the serial
data during the data output state. In addition, the SDO pin
Using an External Clock for Faster Conversion Times
The conversion time of the LTC2404/LTC2408 is deter-
mined by the conditions on the F
O
pin. If F
O
is connected
to GND for 60Hz rejection, the conversion time is 133µs.
If F
O
is connected to V
CC
, the conversion time is 160µs. For
an externally supplied frequency of f
EOSC
(kHz), the con-
version time is:
t
CONV
= 20480/f
EOSC
(kHz)
The resulting frequency rejection is:
Notch Frequency = 8/t
CONV
The maximum output word rate is:
OWR
tt
inHz
CONVERT DATAOUTPUT
=
+
1
APPLICATIONS INFORMATION
WUU
U
MAXIMUM OUTPUT RATE (Hz)
0
INL (BITS)
12
18
20
60
24048 G27
10
8
15 20 25105 303540455055
24
22
16
14
V
CC
= 5V
V
REF
= 5V
F
0
= EXTERNAL
(20480 × MAXIMUM
OUTPUT RATE)
T
A
= 25°C
T
A
= 90°C
MAXIMUM OUTPUT RATE (Hz)
0
RESOLUTION (BITS)*
12
18
20
60
24048 G28
10
8
15 20 25105 303540455055
24
22
16
14
F
O
= EXTERNAL
(20480 × MAXIMUM
OUTPUT RATE)
T
A
= 25°C
T
A
= 90°C
*RESOLUTION =
LOG(V
REF
/RMS NOISE)
LOG (2)
V
CC
= V
REF
= 5V
V
CC
= V
REF
= 3V
Figure 5. INL vs Maximum Output Rate
Figure 6. Resolution vs Maximum Output Rate