Datasheet

21
LTC2401/LTC2402
APPLICATIO S I FOR ATIO
WUUU
SDO
Hi-ZHi-Z
SCK
(INTERNAL)
CS
V
CC
GND
24012 F11
BIT 0
SIG
BIT 29BIT 30
SLEEP
DATA OUTPUT CONVERSIONCONVERSION
EOC
BIT 31
CH0/CH1
V
CC
F
O
FS
SET
ZS
SET
SCK
CH1 SDO
GND
CS
REFERENCE VOLTAGE
ZS
SET
+ 0.1V TO V
CC
0V TO FS
SET
– 100mV
CH0
= INTERNAL OSC/50Hz REJECTION
= EXTERNAL CLOCK SOURCE
= INTERNAL OSC/60Hz REJECTION
1µF
110
9
8
7
6
C
EXT
2
3
4
5
2.7V TO 5.5V
LTC2402
V
CC
V
CC
10k
ANALOG INPUT RANGE
ZS
SET
– 0.12V
REF
TO
FS
SET
+ 0.12V
REF
(V
REF
= FS
SET
– ZS
SET
)
Figure 11. Internal Serial Clock, Autostart Operation
CAPACITANCE ON CS (pF)
1
5
6
7
1000 10000
24012 F12
4
3
10 100 100000
2
1
0
t
SAMPLE
(SEC)
V
CC
= 5V
V
CC
= 3V
CAPACITANCE ON CS (pF)
0
SAMPLE RATE (Hz)
3
4
5
1000
100000
24012 F13
2
1
0
10 100 10000
6
7
8
V
CC
= 5V
V
CC
= 3V
Figure 12. CS Capacitance vs t
SAMPLE
Figure 13. CS Capacitance vs Output Rate