Datasheet

13
LTC2401/LTC2402
APPLICATIO S I FOR ATIO
WUUU
Table 2. LTC2401/LTC2402 Output Data Format
Bit 31 Bit 30 Bit 29 Bit 28 Bit 27 Bit 26 Bit 25 Bit 24 Bit 23 … Bit 4 Bit 3-0
Input Voltage EOC CH SELECT SIG EXR MSB LSB SUB LSBs*
V
IN
> 9/8 • V
REF
0 CH0/CH1 1100 0 11...1 X
9/8 • V
REF
0 CH0/CH1 1100 0 11...1 X
V
REF
+ 1LSB 0 CH0/CH1 1100 0 00...0 X
V
REF
0 CH0/CH1 1011 1 11...1 X
3/4V
REF
+ 1LSB 0 CH0/CH1 1011 0 00...0 X
3/4V
REF
0 CH0/CH1 1010 1 11...1 X
1/2V
REF
+ 1LSB 0 CH0/CH1 1010 0 00...0 X
1/2V
REF
0 CH0/CH1 1001 1 11...1 X
1/4V
REF
+ 1LSB 0 CH0/CH1 1001 0 00...0 X
1/4V
REF
0 CH0/CH1 1000 1 11...1 X
0
+
/0
–
0 CH0/CH1 1/0** 0 0 0 0 0 0 ... 0 X
–1LSB 0 CH0/CH1 0111 1 11...1 X
–1/8 • V
REF
0 CH0/CH1 0111 1 00...0 X
V
IN
< –1/8 • V
REF
0 CH0/CH1 0111 1 00...0 X
*The sub LSBs are valid conversion results beyond the 24-bit level that may be included in averaging or discarded without loss of resolution.
**The sign bit changes state during the 0 code.
disturb the converter operation. If the selection is made
during the conversion state, the result of the conversion in
progress may be outside specifications but the following
conversions will not be affected.
When a fundamental rejection frequency different from
50Hz or 60Hz is required or when the converter must be
synchronized with an outside source, the LTC2401/
LTC2402 can operate with an external conversion clock.
The converter automatically detects the presence of an
external clock signal at the F
O
pin and turns off the internal
oscillator. The frequency f
EOSC
of the external signal must
be at least 2560Hz (1Hz notch frequency) to be detected.
The external clock signal duty cycle is not significant as
long as the minimum and maximum specifications for the
high and low periods t
HEO
and t
LEO
are observed.
While operating with an external conversion clock of a
frequency f
EOSC
, the LTC2401/LTC2402 provide better
than 110dB normal mode rejection in a frequency range
f
EOSC
/2560 ±4% and its harmonics. The normal mode
rejection as a function of the input frequency deviation
from f
EOSC
/2560 is shown in Figure 4.
Whenever an external clock is not present at the F
O
pin, the
converter automatically activates its internal oscillator and
enters the Internal Conversion Clock mode. The LTC2401/
LTC2402 operation will not be disturbed if the change of
conversion clock source occurs during the sleep state or
during the data output state while the converter uses an
INPUT FREQUENCY DEVIATION FROM NOTCH FREQUENCY (%)
–12 –8 –4 0 4 8 12
REJECTION (dB)
24012 F04
–60
–70
–80
–90
–100
–110
–120
–130
–140
Figure 4. LTC2401/LTC2402 Normal Mode Rejection When
Using an External Oscillator of Frequency f
EOSC