Datasheet
LTC2389-18
30
238918f
DIGITAL INTERFACE
To accommodate a variety of application-specific proces-
sor and FPGA data bus widths, the LTC2389-18 output
bus may be configured to operate in either 18-bit parallel,
16-bit parallel, 8-bit parallel or serial modes, as described
in Table 1. The flexible OV
DD
supply allows the LTC2389-18
to communicate with any digital logic operating between
1.8V and 5V, including 2.5V and 3.3V systems.
18-Bit Parallel Bus Configuration
In applications such as FPGA and CPLD based solutions,
where a full 18-bit wide parallel data bus is available, the
LTC2389-18 is capable of providing each conversion
result R[17:0] as one 18-bit word on pins D[17:0]. To
select this bus configuration, pins MODE = MODE[1:0]
should be driven to MODE = 00, as described in Table 1.
If the application does not require the bus to be shared,
drive the chip select pin CS = 0 to enable the LTC2389-18
to drive the bus continuously, as shown in Figure 14.
In applications where the bus must be shared, drive
CS = 1 when other devices are using the bus to Hi-Z
the LTC2389-18 bus pins and drive CS = 0 to allow the
LTC2389-18 to drive the bus, as shown in Figures 15 and 16.
16-Bit Parallel Bus
Configuration
In
applications such as 16-bit microcontroller based solu-
tions, where a 16-bit wide parallel data bus is available, the
LTC2389-18 is capable of providing each conversion result
R[17:0] in two 16-bit words on pins D[17:2]. To select
this bus configuration, pins MODE = MODE[1:0] should
be driven to MODE = 01, as described in Table 1. In this
configuration, pins D0/A0 and D1/A1 become a 2-bit wide
address input A[1:0] which controls whether the upper 16
bits R[17:2] or the lower two bits R[1:0] of the conversion
result are driven on D[17:2], as shown in Figure 17. Tw o
formats are available for outputting the lowest two bits
R[1:0] of the conversion result to accommodate various
application-specific hardware and software constraints, as
shown in Table 1. The chip select pin CS enables the 16-bit
parallel bus to be shared between multiple devices. See the
18-Bit Parallel Bus Configuration section for further details.
8-Bit Parallel Bus Configuration
In applications such as 8-bit microcontroller based solu-
tions, where an 8-bit wide parallel data bus is available,
the LTC2389-18 is capable of providing each conversion
result R[17:0] in three 8-bit words on pins D[17:10].
To select this bus configuration, pins MODE = MODE[1:0]
should be driven
to MODE = 10,
as described in Table 1.
In this configuration, pins D0/A0 and D1/A1 become a
2-bit wide address input A[1:0] which controls whether
the upper eight bits R[17:10], the middle eight bits R[9:2],
or the lower two bits R[1:0] of the conversion result
are driven on D[17:10], as shown in Figure 18. Tw o
formats are available for outputting the lowest two bits
R[1:0] of the conversion result to accommodate various
application-specific hardware and software constraints,
as shown in Table 1. The chip select pin CS enables the
8-bit parallel bus to be shared between multiple devices.
See the 18-Bit Parallel Bus Configuration section for
further details.
applicaTions inFormaTion