Datasheet

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LTC2389-16

238916f

applications inFormation

OVERVIEW

The LTC2389-16 is a low noise, high speed 16-bit succes-

sive approximation register (SAR) ADC. Operating from

a single 5V supply, the LTC2389-16 supports pin-con-

figurable fully differential (±4.096V), pseudo-differential

unipolar (0V to 4.096V) and pseudo-differential bipolar

(±2.048V) analog input ranges, allowing it to interface with

multiple signal chain formats without requiring additional

level translation or signal conditioning. The LTC2389-16

achieves ±1LSB INL (maximum), no missing codes at

16-bits, and 96.0dB (fully differential)/93.5dB (pseudo

differential) SNR (typical).

The LTC2389-16 includes a precision internal 4.096V

reference, with a guaranteed 0.5% initial accuracy and a

±20ppm/°C (maximum) temperature coefficient, as well as

an internal reference buffer. Fast 2.5Msps throughput with

no cycle latency in the parallel interface modes makes the

LTC2389-16 ideally suited for a wide variety of high speed

applications. An internal oscillator sets the conversion time,

easing external timing considerations. The LTC2389-16

dissipates only 162.5mW at 2.5Msps, while both nap and

sleep power-down modes are provided to further reduce

power consumption during inactive periods.

CONVERTER OPERATION

The LTC2389-16 operates in two phases. During the ac-

quisition phase, the charge redistribution capacitor D/A

converter (CDAC) is connected to

the IN

and IN

–

pins

to sample the differential analog input voltage. A falling

edge on the CNVST pin initiates a conversion. During the

conversion phase, the 16-bit CDAC is sequenced through a

successive approximation algorithm, effectively comparing

the sampled input with binary-weighted fractions of the

reference voltage (e.g., V

REF

/2, V

REF

/4 … V

REF

/65536)

using a differential comparator. At the end of conversion,

the CDAC output approximates the sampled analog input.

The ADC control logic then prepares the 16-bit digital

output code for parallel or serial transfer.

TRANSFER FUNCTION

The LTC2389-16 digitizes the full-scale voltage of 2 • V

REF

in fully-differential mode and V

REF

in pseudo-differential

mode, into 2

levels. With V

REF

= 4.096V, the resulting

LSB sizes in fully-differential and pseudo-differential mode

are 125μV and 62.5μV, respectively. The binary format of

the conversion result depends on the logic levels on pins

PD/FD and OB/2C, as described in Table 2. The ideal two’s

complement transfer function is shown in Figure 2, while the

ideal straight binary transfer function is shown in Figure 3.

The ideal offset binary transfer function can be obtained

from the two’s complement transfer function by inverting

the most significant bit (MSB) of each output code.

Figure 2. LTC2389-16 Tw o ’s Complement Transfer Function.

Offset Binary Transfer Function Can Be Obtained by Inverting

the Most Significant Bit (MSB) of Each Output Code

Figure 3. LTC2389-16 Straight Binary Transfer Function

INPUT VOLTAGE (V)

OUTPUT CODE (TWO’S COMPLEMENT)

–1

LSB

238916 F02

011...111

011...110

000...001

000...000

100...000

100...001

111...110

LSB

BIPOLAR

ZERO

111...111

FSR/2 – 1LSB–FSR/2

FSR = +FS – –FS

1LSB = FSR/65536

INPUT VOLTAGE (V)

OUTPUT CODE (STRAIGHT BINARY)

238916 F03