Datasheet

LTC2376-20
15
237620f
For more information www.linear.com/LTC2376-20
applicaTions inForMaTion
Signal-to-Noise Ratio (SNR)
The signal-to-noise ratio (SNR) is the ratio between the
RMS amplitude of the fundamental input frequency and
the RMS amplitude of all other frequency components
except the first five harmonics and DC. Figure 13 shows
that the LTC2376-20 achieves a typical SNR of 104dB at
a 250kHz sampling rate with a 2kHz input.
Power Supply Sequencing
The LTC2376-20 does not have any specific power supply
sequencing requirements. Care should be taken to adhere
to the maximum voltage relationships described in the
Absolute Maximum Ratings section. The LTC2376-20
has a power-on-reset (POR) circuit that will reset the
LTC2376-20 at initial power-up or whenever the power
supply voltage drops below 1V. Once the supply voltage
re-enters the nominal supply voltage range, the POR will
reinitialize the ADC. No conversions should be initiated
until 200µs after a POR event to ensure the reinitialization
period has ended. Any conversions initiated before this
time will produce invalid results.
TIMING AND CONTROL
CNV Timing
The LTC2376-20 conversion is controlled by CNV. A ris-
ing edge on CNV will start a conversion and power up
the LTC2376-20. Once a conversion has been initiated,
it cannot be restarted until the conversion is complete.
For optimum performance, CNV should be driven by a
clean low jitter signal. Converter status is indicated by the
BUSY output which remains high while the conversion is
in progress. To ensure that no errors occur in the digitized
results, any additional transitions on CNV should occur
within 40ns from the start of the conversion or after the
conversion has been completed.
Acquisition
A proprietary sampling architecture allows the LTC2376-20
to begin acquiring the input signal for the next conver-
sion 675ns after the start of the current conversion. This
extends the acquisition time to 3.312µs, easing settling
requirements and allowing the use of extremely low power
ADC drivers. (Refer to the Timing Diagram.)
Internal Conversion Clock
The LTC2376-20 has an internal clock that is trimmed to
achieve a maximum conversion time of 3µs.
Figure 13. 128k Point FFT Plot with f
IN
= 2kHz of the LTC2376-20
FREQUENCY (kHz)
0 25 50 75 125100
–180
AMPLITUDE (dBFS)
–60
–40
–20
–80
–100
–120
–140
–160
0
237620 F13
SNR = 104dB
THD = –128dB
SINAD = 104dB
SFDR = 132dB
Total Harmonic Distortion (THD)
Total Harmonic Distortion (THD) is the ratio of the RMS sum
of all harmonics of the input signal to the fundamental itself.
The out-of-band harmonics alias into the frequency band
between DC and half the sampling frequency (f
SMPL
/2).
THD is expressed as:
THD= 20log
V2
2
+ V3
2
+ V4
2
+…+ V
N
2
V1
where V1 is the RMS amplitude of the fundamental fre-
quency and V2 through V
N
are the amplitudes of the second
through Nth harmonics.
POWER CONSIDERATIONS
The LTC2376-20 provides two power supply pins: the
2.5V power supply (V
DD
), and the digital input/output
interface power supply (OV
DD
). The flexible OV
DD
supply
allows the LTC2376-20 to communicate with any digital
logic operating between 1.8V and 5V, including 2.5V and
3.3V systems.