Datasheet

LTC2298/LTC2297/LTC2296
11
229876fa
UU
U
PI FU CTIO S
A
INA
+
(Pin 1): Channel A Positive Differential Analog
Input.
A
INA
–
(Pin 2): Channel A Negative Differential Analog
Input.
REFHA (Pins 3, 4): Channel A High Reference. Short
together and bypass to Pins 5, 6 with a 0.1µF ceramic chip
capacitor as close to the pin as possible. Also bypass to
Pins 5, 6 with an additional 2.2µF ceramic chip capacitor
and to ground with a 1µF ceramic chip capacitor.
REFLA (Pins 5, 6): Channel A Low Reference. Short
together and bypass to Pins 3, 4 with a 0.1µF ceramic chip
capacitor as close to the pin as possible. Also bypass to
Pins 3, 4 with an additional 2.2µF ceramic chip capacitor
and to ground with a 1µF ceramic chip capacitor.
V
DD
(Pins 7, 10, 18, 63): Analog 3V Supply. Bypass to
GND with 0.1µF ceramic chip capacitors.
CLKA (Pin 8): Channel A Clock Input. The input sample
starts on the positive edge.
CLKB (Pin 9): Channel B Clock Input. The input sample
starts on the positive edge.
REFLB (Pins 11, 12): Channel B Low Reference. Short
together and bypass to Pins 13, 14 with a 0.1µF ceramic
chip capacitor as close to the pin as possible. Also bypass
to Pins 13, 14 with an additional 2.2µF ceramic chip ca-
pacitor and to ground with a 1µF ceramic chip capacitor.
REFHB (Pins 13, 14): Channel B High Reference. Short
together and bypass to Pins 11, 12 with a 0.1µF ceramic
chip capacitor as close to the pin as possible. Also bypass
to Pins 11, 12 with an additional 2.2µF ceramic chip ca-
pacitor and to ground with a 1µF ceramic chip capacitor.
A
INB
–
(Pin 15): Channel B Negative Differential Analog
Input.
A
INB
+
(Pin 16): Channel B Positive Differential Analog
Input.
GND (Pins 17, 64): ADC Power Ground.
SENSEB (Pin 19): Channel B Reference Programming Pin.
Connecting SENSEB to V
CMB
selects the internal reference
and a ±0.5V input range. V
DD
selects the internal reference
and a ±1V input range. An external reference greater than
0.5V and less than 1V applied to SENSEB selects an input
range of ±V
SENSEB
. ±1V is the largest valid input range.
V
CMB
(Pin 20): Channel B 1.5V Output and Input Common
Mode Bias. Bypass to ground with 2.2µF ceramic chip
capacitor. Do not connect to V
CMA
.
LTC2296: I
OVDD
vs Sample Rate,
5MHz Sine Wave Input, –1dB,
O
VDD
= 1.8V
LTC2296: I
VDD
vs Sample Rate,
5MHz Sine Wave Input, –1dB
LTC2296: SFDR vs Input Level,
f
IN
= 5MHz, 2V Range, 25Msps
TYPICAL PERFOR A CE CHARACTERISTICS
UW
INPUT LEVEL (dBFS)
–60 –50 –40 –20–30
–10
0
2296 G13
SFDR (dBc AND dBFS)
120
110
100
90
80
70
60
50
40
30
20
dBFS
dBc
90dBc SFDR
REFERENCE LINE
SAMPLE RATE (Msps)
I
VDD
(mA)
2296 G14
70
60
50
40
30
0
10
20
515
25
30
35
2V RANGE
1V RANGE
0
10
20
515
25
30
35
SAMPLE RATE (Msps)
I
OVDD
(mA)
2296 G15
6
4
2
0