Datasheet

LTC2265-14/
LTC2264-14/LTC2263-14
5
22654314fb
DIGITAL INPUTS AND OUTPUTS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Single-Ended Encode Mode (ENC
–
Tied to GND)
V
IH
High Level Input Voltage V
DD
= 1.8V
l
1.2 V
V
IL
Low Level Input Voltage V
DD
= 1.8V
l
0.6 V
V
IN
Input Voltage Range ENC
+
to GND
l
0 3.6 V
R
IN
Input Resistance (See Figure 11) 30 kΩ
C
IN
Input Capacitance 3.5 pF
DIGITAL INPUTS (CS, SDI, SCK in Serial or Parallel Programming Mode. SDO in Parallel Programming Mode)
V
IH
High Level Input Voltage V
DD
= 1.8V
l
1.3 V
V
IL
Low Level Input Voltage V
DD
= 1.8V
l
0.6 V
I
IN
Input Current V
IN
= 0V to 3.6V
l
–10 10 µA
C
IN
Input Capacitance 3 pF
SDO OUTPUT (Serial Programming Mode. Open-Drain Output. Requires 2kΩ Pull-Up Resistor if SDO Is Used)
R
OL
Logic Low Output Resistance to GND V
DD
= 1.8V, SDO = 0V 200 Ω
I
OH
Logic High Output Leakage Current SDO = 0V to 3.6V
l
–10 10 µA
C
OUT
Output Capacitance 3 pF
DIGITAL DATA OUTPUTS
V
OD
Differential Output Voltage 100Ω Differential Load, 3.5mA Mode
100Ω Differential Load, 1.75mA Mode
l
l
247
125
350
175
454
250
mV
mV
V
OS
Common Mode Output Voltage 100Ω Differential Load, 3.5mA Mode
100Ω Differential Load, 1.75mA Mode
l
l
1.125
1.125
1.250
1.250
1.375
1.375
V
V
R
TERM
On-Chip Termination Resistance Termination Enabled, OV
DD
= 1.8V 100 Ω
POWER REQUIREMENTS
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 9)
SYMBOL PARAMETER CONDITIONS
LTC2265-14 LTC2264-14 LTC2263-14
UNITSMIN TYP MAX MIN TYP MAX MIN TYP MAX
V
DD
Analog Supply Voltage (Note 10)
l
1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V
OV
DD
Output Supply Voltage (Note 10)
l
1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V
I
VDD
Analog Supply Current Sine Wave Input
l
84 98 53 63 42 50 mA
I
OVDD
Digital Supply Current 1-Lane Mode, 1.75mA Mode
1-Lane Mode, 3.5mA Mode
2-Lane Mode, 1.75mA Mode
2-Lane Mode, 3.5mA Mode
l
l
11
20
15
28
18
32
10
19
15
28
17
31
10
18
14
27
17
31
mA
mA
mA
mA
P
DISS
Power Dissipation 1-Lane Mode, 1.75mA Mode
1-Lane Mode, 3.5mA Mode
2-Lane Mode, 1.75mA Mode
2-Lane Mode, 3.5mA Mode
l
l
171
187
178
202
209
234
113
130
122
146
144
169
94
108
101
124
121
146
mW
mW
mW
mW
P
SLEEP
Sleep Mode Power 1 1 1 mW
P
NAP
Nap Mode Power 60 60 60 mW
P
DIFFCLK
Power Increase with Differential Encode Mode Enabled
(No Increase for Sleep Mode)
20 20 20 mW