Datasheet

LTC2265-12/
LTC2264-12/LTC2263-12
19
22654312fb
FUNCTIONAL BLOCK DIAGRAM
Figure 1. Functional Block Diagram
PLL
DATA
SERIALIZER
SAMPLE-
AND-HOLD
12-BIT
ADC CORE
CHANNEL 1
ANALOG
INPUT
12-BIT
ADC CORE
CHANNEL 2
ANALOG
INPUT
1.8V
V
DD
1.8VENC
+
ENC
OV
DD
V
DD
/2
DIFF
REF
AMP
REF
BUF
2.2µF
0.1µF 0.1µF
0.1µF
REFH REFL
RANGE
SELECT
1.25V
REFERENCE
REFH REFL
OUT1A
OUT1B
OUT2A
OUT2B
DATA
CLOCK OUT
FRAME
OGND
VCM1
GND VCM2
0.1µF0.1µF
SDOCS
SENSE
V
REF
F
MODE
CONTROL
REGISTERS
SCKPAR/SER SDI
226512 F01
SAMPLE-
AND-HOLD