Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal QFN 48

LTC2207-14/LTC2206-14

220714614fc

FEATURES

DESCRIPTIO

TYPICAL APPLICATIO

APPLICATIO S

FREQUENCY (MHz)

AMPLITUDE (dBFS)

–70

–30

2207614 TA01b

–90

–110

–80

–50

–10

–20

–40

–60

–100

–120

14-Bit, 105Msps/80Msps

ADCs

The LTC

2207-14/LTC2206-14 are 105Msps/80Msps,

sampling 14-bit A/D converters designed for digitizing

high frequency, wide dynamic range signals up to input

frequencies of 700MHz. The input range of the ADC can

be optimized with the PGA front end.

The LTC2207-14/LTC2206-14 are perfect for demanding

communications applications, with AC performance that

includes 77.3dB SNR and 98dB spurious free dynamic

range (SFDR). Ultralow jitter of 80fs

RMS

allows under-

sampling of high input frequencies with excellent noise

performance. Maximum DC specs include ±1.5LSB INL,

±1LSB DNL (no missing codes) over temperature.

A separate output power supply allows the CMOS output

swing to range from 0.5V to 3.6V.

The ENC

and ENC

–

inputs may be driven differentially

or single-ended with a sine wave, PECL, LVDS, TTL or

CMOS inputs. An optional clock duty cycle stabilizer al-

lows high performance at full speed with a wide range of

clock duty cycles.

Telecommunications

Receivers

Cellular Base Stations

Spectrum Analysis

Imaging Systems

ATE

Sample Rate: 105Msps/80Msps

77.3dBFS Noise Floor

98dB SFDR

SFDR >82dB at 250MHz (1.5V

P-P

Input Range)

PGA Front End (2.25V

P-P

or 1.5V

P-P

Input Range)

700MHz Full Power Bandwidth S/H

Optional Internal Dither

Optional Data Output Randomizer

Single 3.3V Supply

Power Dissipation: 947mW/762mW

Optional Clock Duty Cycle Stabilizer

Out-of-Range Indicator

Pin-Compatible Family

105Msps: LTC2207 (16-Bit), LTC2207-14 (14-Bit)

80Msps: LTC2206 (16-Bit), LTC2206-14 (14-Bit)

65Msps: LTC2205 (16-Bit), LTC2205-14 (14-Bit)

40Msps: LTC2204 (16-Bit)

25Msps: LTC2203 (16-Bit) Single-Ended Clock

10Msps: LTC2202 (16-Bit) Single-Ended Clock

48-Pin 7mm × 7mm QFN Package

–

S/H

AMP

CORRECTION

LOGIC AND

SHIFT REGISTER

OUTPUT

DRIVERS

14-BIT

PIPELINED

ADC CORE

INTERNAL ADC

REFERENCE

GENERATOR

1.25V

COMMON MODE

BIAS VOLTAGE

CLOCK/DUTY

CYCLE

CONTROL

D13

•

ENC

PGA SHDN DITH MODE OE RANDENC

–

ANALOG

INPUT

2207614 TA01

0.5V TO 3.6V

3.3V

SENSE

OGND

2.2μF

0.1μF

0.1μF 0.1μF 0.1μF

GND

ADC CONTROL INPUTS

AIN

–

CLKOUT

–

LTC2207-14: 32K Point FFT,

= 14.86MHz, –1dBFS,

PGA = 0, 105Msps

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

Summary of content (32 pages)

PAGE 1
LTC2207-14/LTC2206-14 14-Bit, 105Msps/80Msps ADCs DESCRIPTIO U FEATURES n n n n n n n n n n n n n n Sample Rate: 105Msps/80Msps 77.3dBFS Noise Floor 98dB SFDR SFDR >82dB at 250MHz (1.5VP-P Input Range) PGA Front End (2.25VP-P or 1.5VP-P Input Range) 700MHz Full Power Bandwidth S/H Optional Internal Dither Optional Data Output Randomizer Single 3.
PAGE 2
LTC2207-14/LTC2206-14 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION OVDD = VDD (Notes 1, 2) TOP VIEW 48 GND 47 PGA 46 RAND 45 MODE 44 OE 43 OF 42 D15 41 D14 40 D13 39 D12 38 OGND 37 OVDD Supply Voltage (VDD) ...................................................... –0.3V to 4V Digital Output Ground Voltage (OGND)........................... –0.3V to 1V Analog Input Voltage (Note 3) ........................................ –0.3V to (VDD + 0.3V) Digital Input Voltage .............................................
PAGE 3
LTC2207-14/LTC2206-14 ANALOG INPUT The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. (Note 4) SYMBOL PARAMETER VIN Analog Input Range (AIN+ – AIN–) CONDITIONS 3.135V ≤ VDD ≤ 3.
PAGE 4
LTC2207-14/LTC2206-14 DYNAMIC ACCURACY The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. AIN = –1dBFS. (Note 4) SYMBOL PARAMETER CONDITIONS SFDR 5MHz Input (2.25V Range, PGA = 0) 5MHz Input (1.5V Range, PGA = 1) Spurious Free Dynamic Range 4th Harmonic or Higher 15MHz Input (2.25V Range, PGA = 0) 15MHz Input (1.5V Range, PGA = 1) MIN l 90 l 86.5 5MHz Input (2.25V Range, PGA = 0) 5MHz Input (1.
PAGE 5
LTC2207-14/LTC2206-14 COMMON MODE BIAS CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. (Note 4) PARAMETER CONDITIONS VCM Output Voltage IOUT = 0 VCM Output Tempco IOUT = 0 40 ppm/°C VCM Line Regulation 3.135V ≤ VDD ≤ 3.465V 1 mV/ V VCM Output Resistance –1mA ≤ | IOUT | ≤ 1mA 2 Ω l MIN TYP MAX UNITS 1.15 1.25 1.
PAGE 6
LTC2207-14/LTC2206-14 POWER REQUIREMENTS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. AIN = –1dBFS. (Note 4) SYMBOL PARAMETER CONDITIONS MIN l 3.135 LTC2206-14 TYP MAX MIN 3.3 3.465 3.135 VDD Analog Supply Voltage PSHDN Shutdown Power OVDD Output Supply Voltage IVDD Analog Supply Current DC Input l 231 275 PDIS Power Dissipation DC Input l 762 908 SHDN = VDD 0.2 l 0.5 LTC2207-14 TYP MAX 3.
PAGE 7
LTC2207-14/LTC2206-14 TIMING DIAGRAM tAP ANALOG INPUT N+1 N+4 N N+3 N+2 tH tL ENC – ENC+ tD N–7 D0-D13, OF N–6 N–5 N–4 N–3 tC CLKOUT+ CLKOUT – 2207614 TD01 TYPICAL PERFORMANCE CHARACTERISTICS LTC2207-14: Differential Nonlinearity (DNL) vs Output Code 1.0 0.5 0.8 0.4 0.6 0.3 0.2 0 –0.2 –0.4 200000 0.2 0 –0.1 –0.3 –0.4 100000 50000 –0.5 2048 4096 6144 8192 10240 12288 14336 16384 OUTPUT CODE 0 LTC2207-14: 32K Point FFT, fIN = 5.
PAGE 8
LTC2207-14/LTC2206-14 TYPICAL PERFORMANCE CHARACTERISTICS LTC2207-14: SFDR vs Input Level, fIN = 15.1MHz, PGA = 0, RAND “On”, Dither “Off” LTC2207-14: 64K Point FFT, fIN = 15.1MHz, –25dBFS, PGA = 0, RAND “On”, Dither “On” 0 LTC2207-14: SFDR vs Input Level, fIN = 15.
PAGE 9
LTC2207-14/LTC2206-14 TYPICAL PERFORMANCE CHARACTERISTICS LTC2207-14: 64K Point FFT, fIN = 70.1MHz, –25dBFS, PGA = 0, RAND “On”, Dither “On’ LTC2207-14: 32K Point FFT, fIN = 174.8MHz, –1dBFS, PGA = 1, RAND “On”, Dither “Off’ 0 0 –10 –10 –20 –20 –20 –30 –30 –30 –40 –50 –60 –70 –80 AMPLITUDE (dBFS) 0 –10 AMPLITUDE (dBFS) AMPLITUDE (dBFS) LTC2207-14: 64K Point FFT, fIN = 70.
PAGE 10
LTC2207-14/LTC2206-14 TYPICAL PERFORMANCE CHARACTERISTICS LTC2207-14: IVDD vs Sample Rate, fIN = 5.1MHz, –1dBFS 340 105 320 100 110 VDD = 3.3V 300 SFDR 95 90 85 SNR 80 VDD = 3.47V 280 VDD = 3.13V 260 240 220 75 70 2.8 3.2 3.0 3.4 SUPPLY VOLTAGE (V) 200 3.6 10 30 90 70 110 50 SAMPLE RATE (Msps) 130 90 80 SFR 70 30 0.5 0.6 0.3 0.4 0.2 0 –0.2 –0.4 0 –0.1 –0.2 –0.3 –0.4 –1.0 –0.
PAGE 11
LTC2207-14/LTC2206-14 TYPICAL PERFORMANCE CHARACTERISTICS LTC2206-14: 64K Point FFT, fIN = 15.1MHz, –25dBFS, PGA = 0, RAND = “On”, Dither “On” 0 –10 –20 –20 –30 –30 –40 –50 –60 –70 –80 –60 –70 –80 –100 –100 –110 –110 10 30 20 FREQUENCY (MHz) –120 40 100 –50 –90 0 120 –40 –90 –120 0 10 30 20 FREQUENCY (MHz) 20 0 –10 –20 –20 –30 –30 –50 –60 –70 –80 –40 –50 –60 –70 –80 –90 –90 –100 –100 –110 –110 –120 0 LTC2206-14: 32K Point 2-Tone FFT, fIN = 14.87MHz and 18.
PAGE 12
LTC2207-14/LTC2206-14 TYPICAL PERFORMANCE CHARACTERISTICS LTC2206-14: 64K Point FFT, fIN = 70.1MHz, –25dBFS, PGA = 0, RAND = “On”, Dither “Off” LTC2206-14: 64K Point FFT, fIN = 70.1MHz, –25dBFS, PGA = 0, RAND = “On”, Dither “On” 0 0 –10 –10 –20 –20 –20 –30 –30 –30 –40 –50 –60 –70 –80 AMPLITUDE (dBFS) 0 –10 AMPLITUDE (dBFS) AMPLITUDE (dBFS) LTC2206-14: 32K Point 2-Tone FFT, fIN = 69.2MHz and 76.
PAGE 13
LTC2207-14/LTC2206-14 TYPICAL PERFORMANCE CHARACTERISTICS LTC2206-14: SNR and SFDR vs Sample Rate, fIN = 5.1MHz, –1dBFS LTC2206-14: SNR and SFDR vs Supply Voltage (VDD), fIN = 5.1MHz, –1dBFS 110 105 LTC2206-14: IVDD vs Sample Rate, fIN = 5.1MHz, –1dBFS 110 340 105 320 95 90 85 80 SNR 75 70 VDD = 3.3V 100 SFDR 300 95 IVDD (mA) 100 SNR AND SFDR (dBFS) SNR AND SFDR (dBFS) SFDR 90 85 35 60 110 85 SAMPLE RATE (Msps) 135 SNR 220 70 2.8 160 VDD = 3.13V 260 240 80 75 10 VDD = 3.
PAGE 14
LTC2207-14/LTC2206-14 TYPICAL PERFORMANCE CHARACTERISTICS Full-Scale Settling After Wake Up from Shutdown or Starting Encode Clock 1.0 5 0.8 4 0.6 3 FULL-SCALE ERROR (%) FULL-SCALE ERROR (%) Mid-Scale Settling After Wake Up from Shutdown or Starting Encode Clock 0.4 0.2 0 –0.2 –0.4 2 1 0 –1 –2 –0.6 –3 –0.8 –4 –1.
PAGE 15
LTC2207-14/LTC2206-14 PIN FUNCTIONS OF (Pin 43): Over/Under Flow Digital Output. OF is high when an over or under ﬂow has occurred. OE (Pin 44): Output Enable Pin. Low enables the digital output drivers. High puts digital outputs in Hi-Z state. MODE (Pin 45): Output Format and Clock Duty Cycle Stabilizer Selection Pin. Connecting MODE to 0V selects offset binary output format and disables the clock duty cycle stabilizer.
PAGE 16
LTC2207-14/LTC2206-14 OPERATION DYNAMIC PERFORMANCE Signal-to-Noise Plus Distortion Ratio The signal-to-noise plus distortion ratio [S/(N+D)] is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all other frequency components at the ADC output. The output is band limited to frequencies above DC to below half the sampling frequency.
PAGE 17
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION CONVERTER OPERATION The LTC2207-14/LTC2206-14 are CMOS pipelined multistep converters with a front-end PGA. As shown in Figure 1, the converter has ﬁve pipelined ADC stages; a sampled analog input will result in a digitized value seven clock cycles later (see the Timing Diagram section). The analog input is differential for improved common mode noise immunity and to maximize the input range.
PAGE 18
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION SAMPLE/HOLD OPERATION AND INPUT DRIVE Input Drive Impedance Sample/Hold Operation As with all high performance, high speed ADCs the dynamic performance of the LTC2207-14/LTC2206-14 can be inﬂuenced by the input drive circuitry, particularly the second and third harmonics. Source impedance and input reactance can inﬂuence SFDR. At the falling edge of ENC the sample-and-hold circuit will connect the 4.
PAGE 19
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION INPUT DRIVE CIRCUITS Input Filtering A ﬁrst order RC lowpass ﬁlter at the input of the ADC can serve two functions: limit the noise from input circuitry and provide isolation from ADC S/H switching. The LTC220714/LTC2206-14 have a very broadband S/H circuit, DC to 700MHz; it can be used in a wide range of applications; therefore, it is not possible to provide a single recommended RC ﬁlter.
PAGE 20
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION Direct Coupled Circuits Figure 5 demonstrates the use of a differential ampliﬁer to convert a single ended input signal into a differential input signal. The advantage of this method is that it provides low frequency input response; however, the limited gain bandwidth of any op amp or closed-loop ampliﬁer will degrade the ADC SFDR at high input frequencies. Additionally, wideband op amps or differential ampliﬁers tend to have high noise.
PAGE 21
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION VDD LTC2207-14/ LTC2206-14 VDD TO INTERNAL ADC CLOCK DRIVERS 1.6V 6k ENC+ VCM 1.25V 2.2μF 2 3.3V LT1461-2.5 1μF 6 SENSE VDD 6k LTC2207-14/ LTC2206-14 ENC– 2.2μF 4 1.6V 2207614 F07 2207614 F08a Figure 8a. Equivalent Encode Input Circuit Figure 7. A 2.25V Range ADC with an External 2.5V Reference 0.1μF ENC+ T1 50Ω 100Ω 8.2pF 0.1μF LTC2207-14/ LTC2206-14 50Ω 0.1μF ENC+ VTHRESHOLD = 1.6V ENC– 1.
PAGE 22
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION Driving the Encode Inputs Maximum and Minimum Encode Rates The noise performance of the LTC2207-14/LTC2206-14 can depend on the encode signal quality as much as on the analog input. The encode inputs are intended to be driven differentially, primarily for noise immunity from common mode noise sources. Each input is biased through a 6k resistor to a 1.6V bias.
PAGE 23
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION Table 1. MODE Pin Function DIGITAL OUTPUTS Digital Output Buffers Figure 11 shows an equivalent circuit for a single output buffer. Each buffer is powered by OVDD and OGND, isolated from the ADC power and ground. The additional N-channel transistor in the output driver allows operation down to low voltages. The internal resistor in series with the output eliminates the need for external damping resistors.
PAGE 24
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION converter data to the digital system. This is necessary when using a sinusoidal encode. Data can be latched on the rising edge of CLKOUT+ or the falling edge of CLKOUT–. CLKOUT+ falls and CLKOUT– rises as the data outputs are updated. Digital Output Randomizer Interference from the ADC digital outputs is sometimes unavoidable. Interference from the digital outputs may be from capacitive or inductive coupling or coupling through the ground plane.
PAGE 25
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION LTC2207-14/LTC2206-14 AIN+ ANALOG INPUT AIN– 14-BIT PIPELINED ADC CORE S/H AMP CLOCK/DUTY CYCLE CONTROL ENC + DIGITAL SUMMATION OUTPUT DRIVERS CLKOUT OF D13 • • • D0 MULTIBIT DEEP PSEUDO-RANDOM NUMBER GENERATOR PRECISION DAC 2207614 F14 ENC – DITH DITHER ENABLE HIGH = DITHER ON, LOW = DITHER OFF Figure 14.
PAGE 26
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION Silkscreen Top Top Side 220714614fc 26
PAGE 27
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION Inner Layer 2 Inner Layer 4 Inner Layer 3 Inner Layer 5 220714614fc 27
PAGE 28
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION Bottom Side Silkscreen Bottom 220714614fc 28
PAGE 29
LTC2207-14/LTC2206-14 APPLICATIONS INFORMATION RANDOMIZER (REQUIRES CHANGE IN SELECTED DEVICE IN PSCOPE) 0V 3.3V NOT PROVIDED BY DC718 JUMPERS ARE SHOWN IN DEFAULT POSITIONS CLOCK POLARITY PGA SENSE CLOCK OUT MSB DIGITAL OUTPUTS TO DC718 (2.
PAGE 30
C30 0.01μF C10 0.01μF R31 * ASSEMBLY TYPE DC918C-A DC918C-B DC918C-C DC918C-D DC918C-E DC918C-F DC918C-G DC918C-H DC918C-I DC918C-J DC918C-K DC918C-L 5 4 T2 1 2 U1 LTC2207CUK LTC2207CUK LTC2206CUK LTC2206CUK LTC2205CUK LTC2205CUK LTC2204CUK LTC2207CUK-14 LTC2207CUK-14 LTC2206CUK-14 LTC2206CUK-14 LTC2205CUK-14 R9 10Ω C5 4.7pF 1.8pF 4.7pF 1.8pF 4.7pF 1.8pF 4.7pF 4.7pF 1.8pF 4.7pF 1.8pF 4.7pF C15 0.1μF R28 49.9Ω R27 49.9Ω C5 * R26 5.1Ω C7, C28 8.2pF 3.9pF 8.2pF 3.9pF 8.2pF 3.9pF 8.2pF 8.2pF 3.
PAGE 31
LTC2207-14/LTC2206-14 PACKAGE DESCRIPTION UK Package 48-Lead Plastic QFN (7mm × 7mm) (Reference LTC DWG # 05-08-1704 Rev C) 0.70 p 0.05 5.15 p 0.05 5.50 REF 6.10 p 0.05 7.50 p 0.05 (4 SIDES) 5.15 p 0.05 PACKAGE OUTLINE 0.25 p 0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 7.00 p 0.10 (4 SIDES) 0.75 p 0.05 R = 0.10 TYP R = 0.115 TYP 47 48 0.40 p 0.10 PIN 1 TOP MARK (SEE NOTE 6) 1 2 PIN 1 CHAMFER C = 0.35 5.15 p 0.10 5.50 REF (4-SIDES) 5.
PAGE 32
LTC2207-14/LTC2206-14 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1747 12-Bit, 80Msps ADC 72dB SNR, 87dB SFDR, 48-Pin TSSOP Package LTC1748 14-Bit, 80Msps, 5V ADC 76.