Datasheet
LTC2203/LTC2202
25
22032fd
Figure 11. Descrambling a Scrambled Digital Output
•
•
•
D1
D0
D2
D14
D15
PC BOARD
FPGA
CLKOUT
OF
D15/D0
D14/D0
D2/D0
D1/D0
D0
22032 F12
LTC2203/
LTC2202
Output Driver Power
Separate output power and ground pins allow the output
drivers to be isolated from the analog circuitry. The power
supply for the digital output buffers, OV
DD
, should be tied
to the same power supply as for the logic being driven. For
example, if the converter is driving a DSP powered by a
1.8V supply, then OV
DD
should be tied to that same 1.8V
supply. In CMOS mode OV
DD
can be powered with any
logic voltage up to 3.6V. OGND can be powered with any
voltage from ground up to 1V and must be less than OV
DD
.
The logic outputs will swing between OGND and OV
DD
.
APPLICATIONS INFORMATION