Datasheet

9
21754312fa
LTC2175-12/
LTC2174-12/LTC2173-12
TiMing DiagraMs
2-Lane Output Mode, 12-Bit Serialization
1-Lane Output Mode, 16-Bit Serialization
ANALOG
INPUT
ENC
–
ENC
+
DCO
–
DCO
+
t
AP
t
ENCH
t
ENCL
t
SER
t
SER
t
SER
t
PD
t
DATA
t
FRAME
SAMPLE N-6 SAMPLE N-5 SAMPLE N-4
N+1
N
217512 TD03
D7 D5 D3 D1 D11 D9 D7 D5 D3 D1 D11 D9 D7
OUT#A
–
OUT#A
+
FR
+
FR
–
D6 D4 D2 D0 D10 D8 D6 D4 D2 D0 D10 D8 D6
OUT#B
–
OUT#B
+
ANALOG
INPUT
ENC
–
ENC
+
DCO
–
DCO
+
t
AP
t
ENCH
t
ENCL
t
SER
t
PD
t
DATA
t
FRAME
SAMPLE N-6 SAMPLE N-5 SAMPLE N-4
N+1
N
t
SER
t
SER
217512 TD05
D
X
* D
Y
* D
X
* D
Y
*0 0 D11 D10 D9 D8 D10 D9 D8D7 D6 D5 D4 D3 D2 D1 D0 0 0 D11
OUT#A
–
OUT#A
+
FR
–
FR
+
OUT#B
+
, OUT#B
–
ARE DISABLED
*D
X
AND D
Y
ARE EXTRA NON-DATA BITS FOR COMPLETE SOFTWARE COMPATIBILITY WITH THE 14-BIT
VERSIONS OF THESE A/Ds. DURING NORMAL NON-OVERRANGED OPERATION D
X
AND D
Y
ARE SET TO
LOGIC 0. SEE THE DATA FORMAT SECTION FOR MORE DETAILS.