Datasheet

LTC2175-12/
LTC2174-12/LTC2173-12
10
21754312fa
TiMing DiagraMs
One-Lane Output Mode, 14-Bit Serialization
ANALOG
INPUT
ENC
ENC
+
DCO
DCO
+
t
AP
t
ENCH
t
ENCL
t
SER
t
PD
t
DATA
t
FRAME
SAMPLE N-6 SAMPLE N-5 SAMPLE N-4
N+1
N
t
SER
t
SER
217512 TD06
D1 D0 D
X
* D
X
* D
Y
*D
Y
* D11 D10 D9 D8 D10 D9 D8D7 D6 D5 D4 D3 D2 D1 D0 D11
OUT#A
OUT#A
+
FR
FR
+
OUT#B
+
, OUT#B
ARE DISABLED
*D
X
AND D
Y
ARE EXTRA NON-DATA BITS FOR COMPLETE SOFTWARE COMPATIBILITY WITH THE 14-BIT
VERSIONS OF THESE A/Ds. DURING NORMAL NON-OVERRANGED OPERATION D
X
AND D
Y
ARE SET TO
LOGIC 0. SEE THE DATA FORMAT SECTION FOR MORE DETAILS.
One-Lane Output Mode, 12-Bit Serialization
ANALOG
INPUT
ENC
ENC
+
DCO
DCO
+
t
AP
t
ENCH
t
ENCL
t
SER
t
PD
t
DATA
t
FRAME
SAMPLE N-6 SAMPLE N-5 SAMPLE N-4
N+1
N
t
SER
t
SER
217512 TD07
D3 D2 D1 D0 D11 D10 D9 D8 D10 D9D7 D6 D5 D4 D3 D2 D1 D0 D11
OUT#A
OUT#A
+
FR
FR
+
OUT#B
+
, OUT#B
ARE DISABLED
A6
t
S
t
DS
A5 A4 A3 A2 A1 A0 XX
D7 D6 D5 D4 D3 D2 D1 D0
XX XX XX XX XX XX XX
CS
SCK
SDI
R/W
SDO
HIGH IMPEDANCE
t
DH
t
DO
t
SCK
t
H
A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
217512 TD04
CS
SCK
SDI
R/W
SDO
HIGH IMPEDANCE
SPI Port Timing (Readback Mode)
SPI Port Timing (Write Mode)